AD7998BRU-1 Analog Devices Inc, AD7998BRU-1 Datasheet - Page 18
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AD7998BRU-1
Manufacturer Part Number
AD7998BRU-1
Description
IC,Data Acquisition System,8-CHANNEL,12-BIT,TSSOP,20PIN,PLASTIC
Manufacturer
Analog Devices Inc
Datasheet
1.AD7997BRUZ-1.pdf
(32 pages)
Specifications of AD7998BRU-1
Number Of Bits
12
Sampling Rate (per Second)
188k
Data Interface
I²C, Serial
Number Of Converters
1
Power Dissipation (max)
2.2mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP (0.173", 4.40mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
EVAL-AD7998CBZ - BOARD EVALUATION FOR AD7998CBZ
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
AD7997/AD7998
INTERNAL REGISTER STRUCTURE
The AD7997/AD7998 contain 17 internal registers that are used
to store conversion results, high and low conversion limits, and
information to configure and control the device (see Figure 25).
Sixteen are data registers and one is an address pointer register.
Each data register has an address that the address pointer register
points to when communicating with it. The conversion result
register is the only data register that is read only.
ADDRESS POINTER REGISTER
Because it is the register to which the first data byte of every
write operation is written automatically, the address pointer
register does not have and does not require an address. The
address pointer register is an 8-bit register in which the 4 LSBs
are used as pointer bits to store an address that points to one of
the AD7997/AD7998’s data registers. The 4 MSBs are used as
command bits when operating in Mode 2 (see the Modes of
Operation section). The first byte following each write address
is to the address pointer register, containing the address of one
of the data registers. The 4 LSBs select the data register to which
subsequent data bytes are written. Only the 4 LSBs of this register
are used to select a data register. On power-up, the address
pointer register contains all 0s, pointing to the conversion result
register.
Table 7. Address Pointer Register
C4
0
Table 8. AD7997/AD7998 Register Addresses
P3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
P2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
C3
0
P1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
C2
0
P0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Registers
Conversion Result Register (Read)
Alert Status Register (Read/Write)
Configuration Register (Read/Write)
Cycle Timer Register (Read/Write)
DATA
DATA
Hysteresis Reg CH1 (Read/Write)
DATA
DATA
Hysteresis Reg CH2 (Read/Write)
DATA
DATA
Hysteresis Reg CH3 (Read/Write)
DATA
DATA
Hysteresis Reg CH4 (Read/Write)
C1
0
LOW
HIGH
LOW
HIGH
LOW
HIGH
LOW
HIGH
Reg CH1 (Read/Write)
Reg CH2 (Read/Write)
Reg CH3 (Read/Write)
Reg CH4 (Read/Write)
Reg CH1 (Read/Write)
Reg CH2 (Read/Write)
Reg CH3 (Read/Write)
Reg CH4 (Read/Write)
P3
Register Select
P2
P1
P0
Rev. 0 | Page 18 of 32
REGISTER
ADDRESS
POINTER
Figure 25. AD7997/AD7998 Register Structure
SERIAL BUS INTERFACE
RESULT REGISTER
CONFIGURATION
REGISTER CH1
REGISTER CH2
REGISTER CH2
REGISTER CH3
REGISTER CH4
ALERT STATUS
REGISTER CH3
REGISTER CH1
REGISTER CH3
CYCLE TIMER
REGISTER CH1
REGISTER CH2
REGISTER CH4
REGISTER CH4
CONVERSION
HYSTERESIS
HYSTERESIS
HYSTERESIS
DATA
DATA
HYSTERESIS
REGISTER
DATA
DATA
DATA
DATA
REGISTER
REGISTER
DATA
DATA
HIGH
HIGH
LOW
LOW
LOW
HIGH
LOW
HIGH
D
A
A
T
SDA
SCL