AD7998BRU-1 Analog Devices Inc, AD7998BRU-1 Datasheet - Page 27
![IC,Data Acquisition System,8-CHANNEL,12-BIT,TSSOP,20PIN,PLASTIC](/photos/6/56/65613/ru-20_sml.jpg)
AD7998BRU-1
Manufacturer Part Number
AD7998BRU-1
Description
IC,Data Acquisition System,8-CHANNEL,12-BIT,TSSOP,20PIN,PLASTIC
Manufacturer
Analog Devices Inc
Datasheet
1.AD7997BRUZ-1.pdf
(32 pages)
Specifications of AD7998BRU-1
Number Of Bits
12
Sampling Rate (per Second)
188k
Data Interface
I²C, Serial
Number Of Converters
1
Power Dissipation (max)
2.2mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP (0.173", 4.40mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
EVAL-AD7998CBZ - BOARD EVALUATION FOR AD7998CBZ
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
ALERT/BUSY PIN
The ALERT/BUSY pin may be configured as an alert output or
as a busy output, as shown in Table 12.
SMBus ALERT
The AD7997/AD7998 ALERT output is an SMBus interrupt line
for devices that want to trade their ability to master for an extra
pin. The AD7997/AD7998 is a slave-only device that uses the
SMBus ALERT to signal the host device that it wants to talk.
The SMBus ALERT on the AD7997/AD7998 is used as an out-
of-range indicator (a limit violation indicator).
The ALERT pin has an open-drain configuration that allows
the ALERT outputs of several AD7997/AD7998s to be wired-
AND’ed together when the ALERT pin is active low. D0 of the
configuration register is used to set the active polarity of the
ALERT output. The power-up default is active low. The ALERT
function can be enabled or disabled by setting D2 of the con-
figuration register to 1 or 0, respectively.
The host device can process the alert interrupt and simultane-
ously access all SMBus alert devices through the alert response
address. Only the device that pulled the alert low acknowledges
the alert response address (ARA). If more than one device pulls
the ALERT pin low, the highest priority (lowest address) device
wins communication rights via standard I
the slave address transfer.
The ALERT output becomes active when the value in the
conversion result register exceeds the value in the DATA
register or falls below the value in the DATA
selected channel. It is reset when a write operation to the
configuration register sets D1 to a 1, or when the conversion
result returns N LSB below or above the value stored in the
DATA
value in the hysteresis register (see the Limit Registers section).
The ALERT output requires an external pull-up resistor that can
be connected to a voltage different from V
mum voltage rating of the ALERT output pin is not exceeded.
The value of the pull-up resistor depends on the application, but
should be as large as possible to avoid excessive sink currents at
the ALERT output.
HIGH
register or the DATA
SDA
SCL
START BY
MASTER
0
1
0
LOW
HS MODE MASTER CODE
0
register, respectively. N is the
FAST MODE
0
2
DD
C arbitration during
LOW
1
provided the maxi-
register for a
Figure 31. Placing the Part into High Speed Mode
X
X
HIGH
X
Rev. 0 | Page 27 of 32
NACK
9
Sr
1
BUSY
When the ALERT/BUSY pin is configured as a BUSY output the
pin is used to indicate when a conversion is taking place. The
polarity of the BUSY pin is programmed through bit D0 in the
Configuration register.
PLACING THE AD7997-1/AD7998-1 INTO
HIGH SPEED MODE
High speed mode communication commences after the master
addresses all devices connected to the bus with the master code,
00001XXX, to indicate that a high speed mode transfer is to
begin. No device connected to the bus is allowed to acknowledge
the high speed master code; therefore, the code is followed by a
not-acknowledge (see Figure 31). The master must then issue a
repeated start followed by the device address with an R/ W bit.
The selected device then acknowledges its address.
All devices continue to operate in high speed mode until such a
time as the master issues a stop condition. When the stop condi-
tion is issued, the devices all return to fast mode.
THE ADDRESS SELECT (AS) PIN
The address select pin on the AD7997/AD7998 is used to set
the I
be tied to V
be made as close as possible to the AS pin; avoid having long
tracks introducing extra capacitance on to the pin. This is
important for the float selection, as the AS pin has to charge to a
midpoint after the start bit during the first address byte. Extra
capacitance on the AS pin increases the time taken to charge to
the midpoint and may cause an incorrect decision on the device
address. When the AS pin is left floating, the AD7997/AD7998
can work with a capacitive load up to 40 pF.
0
2
C address for the AD7997/AD7998 device. The AS pin can
1
SERIAL BUS ADDRESS BYTE
DD
HIGH SPEED MODE
0
, to AGND, or left floating. The selection should
A3
A2
A1
AD7997/AD7998
A0
ACK. BY
9
AD7997/AD7998