AD9552BCPZ-REEL7 Analog Devices Inc, AD9552BCPZ-REEL7 Datasheet - Page 27

• Manufacturer Part Number: AD9552BCPZ-REEL7
• Description: Precision Clock Translator
• Manufacturer: Analog Devices Inc
• Type: Clock Generatorr

Specifications of AD9552BCPZ-REEL7

• Design Resources: Clock Distribution Circuit with Pin-Programmable Output Frequency, Output Logic Levels, and Fanout (CN0152)
• Pll: Yes
• Input: Clock, Crystal
• Output: CMOS, LVDS, LVPECL
• Number Of Circuits: 1
• Ratio - Input:output: 2:2
• Differential - Input:output: No/Yes
• Frequency - Max: 900MHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-LFCSP
• Frequency-max: 900MHz
• Number Of Elements: 1
• Pll Input Freq (min): 6.6MHz
• Pll Input Freq (max): 112.5MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: LFCSP EP
• Output Frequency Range: 0 to 900MHz
• Operating Temperature Classification: Industrial
• Pin Count: 32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Address
0x18
0x19
Input Receiver and Band Gap Control (Register 0x1A)
Table 22.
Address
0x1A
XTAL Control (Register 0x1B to Register 0x1D)
Table 23.
Address
0x1B
0x1C
0x1D
Bit
[7:3]
[2:0]
7
[6:0]
Bit
7
[6:2]
1
0
Bit
7
6
[5:0]
[7:0]
[7:3]
2
1
0
Bit Name
Receiver reset
Band gap voltage adjust
Unused
Enable SPI control of band gap
voltage
P
Unused
Bit Name
Disable SPI control of XTAL
tuning capacitance
Unused
XTAL tuning capacitor control
Unused
Unused
Select 2× frequency multiplier
Unused
Use crystal resonator
Bit Name
P
Enable SPI control of
OUT1 dividers
1
0
divider
divider
Description
Bits[4:0] of the 6-bit P
P
The 3-bit P
000 = 4 (default).
001 = 5.
010 = 6.
011 = 7.
100 = 8.
101 = 9.
110 = 10.
111 = 11.
The P
Controls functionality of OUT1 dividers.
0 = OUT1 dividers defined by the Y[5:0] pins (default).
1 = contents of Register 0x17 and Register 0x18 define OUT1 dividers (P
Unused.
1
= 10 0000 (32). The P
0
bits are ineffective unless Register 0x19[7] = 1.
Description
Input receiver reset control. This is an autoclearing bit.
0 = normal operation (default).
1 = reset input receiver logic.
Unused.
Enables functionality of Bits[6:2].
0 = the device automatically selects receiver band gap voltage (default).
1 = Bits[6:2] define the receiver band gap voltage.
Description
Disables functionality of Bits[5:0].
0 = tuning capacitance defined by Bits[5:0].
1 = the device automatically selects XTAL tuning capacitance (default).
Unused.
Capacitance value coded as inverted binary (0.25 pF per bit); that is, 111111 is 0 pF,
111110 is 0.25 pF, and so on. The default value, 000000, is 15.75 pF.
Unused.
Unused.
Select/bypass the 2× frequency multiplier.
0 = bypassed (default).
1 = selected.
Unused.
Automatic external reference select override.
0 = the device automatically selects the external reference path if an external
reference signal is present (default).
1 = the device uses the crystal resonator input whether or not an external reference
signal is present.
Controls the band gap voltage setting from minimum (0 0000) to maximum (1 1111).
Default is 0 0000.
0
divider for OUT1. The P
Rev. C | Page 27 of 32
1
divider for OUT1 (1 ≤ P
1
bits are ineffective unless Register 0x19[7] = 1.
0
divide value is as follows:
1
≤ 63). Do not set these bits to 000000. Default is
0
and P
1
).
AD9552