AD9600ABCPZ-125 Analog Devices Inc, AD9600ABCPZ-125 Datasheet - Page 37
AD9600ABCPZ-125
Manufacturer Part Number
AD9600ABCPZ-125
Description
10Bit 125Msps Dual 1.8V PB Free ADC
Manufacturer
Analog Devices Inc
Datasheet
1.AD9600ABCPZ-105.pdf
(72 pages)
Specifications of AD9600ABCPZ-125
Number Of Bits
10
Sampling Rate (per Second)
125M
Data Interface
Serial, SPI™
Number Of Converters
2
Power Dissipation (max)
800mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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CHANNEL/CHIP SYNCHRONIZATION
The AD9600 has a SYNC input that offers the user flexible
synchronization options for synchronizing the internal blocks.
The clock divider sync feature is useful to guarantee synchronized
sample clocks across multiple ADCs. The signal monitor block can
also be synchronized using the SYNC input, allowing properties of
the input signal to be measured during a specific period. The
input clock divider can be enabled to synchronize on a single
occurrence of the sync signal or on every occurrence. The signal
monitor block is synchronized on every SYNC input signal.
Rev. B | Page 37 of 72
The SYNC input is internally synchronized to the sample clock;
however, to ensure there is no timing uncertainty between
multiple parts, the SYNC input signal should be externally
synchronized to the input clock signal, meeting the setup and
hold times shown in Table 5. The SYNC input should be driven
using a single-ended CMOS-type signal.
AD9600
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