AD9778ABSVZ Analog Devices Inc, AD9778ABSVZ Datasheet - Page 35

• Manufacturer Part Number: AD9778ABSVZ
• Description: IC,D/A CONVERTER,DUAL,14-BIT,CMOS,TQFP,100PIN
• Manufacturer: Analog Devices Inc

Specifications of AD9778ABSVZ

• Number Of Bits: 14
• Data Interface: Parallel
• Number Of Converters: 2
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 300mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP Exposed Pad, 100-eTQFP, 100-HTQFP, 100-VQFP
• Package: 100TQFP EP
• Resolution: 14 Bit
• Conversion Rate: 1 GSPS
• Architecture: Interpolation Filter
• Digital Interface Type: Parallel
• Number Of Outputs Per Chip: 2
• Output Type: Current
• Full Scale Error: ±2(Typ) %FSR
• Integral Nonlinearity Error: ±1.5(Typ) LSB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9778A-EBZ - BOARD EVALUATION AD9778A
• Settling Time: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 64. Interpolation/Modulation Combination of −f
Figure 66. Interpolation/Modulation Combination of 2f
Figure 65. Interpolation/Modulation Combination of f
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–90
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10
10
10
0
0
0
–4
–4
–4
–3
–3
–3
–2
–2
–2
f
f
f
OUT
OUT
OUT
–1
–1
–1
(× Input Data Rate)
(× Input Data Rate)
(× Input Data Rate)
0
0
0
1
1
1
2
2
2
DAC
DAC
DAC
3
3
3
/8 Filter
/8 Filter
/8 Filter
4
4
4
Rev. B | Page 35 of 56
Shifted mode filter responses allow the pass band to be centered
around ±0.5 f
the shifted mode response does not affect the center frequency
of the signal. Instead, the pass band of the filter is simply shifted.
For example, use the response shown in Figure 67 and assume
the signal in-band is a complex signal over the bandwidth 3.2 f
to 3.3 f
the pass band becomes centered at 3.5 f
remains at the same place in the spectrum. The shifted mode
capability allows the filter pass band to be placed anywhere in
the DAC Nyquist bandwidth.
The AD9776A/AD9778A/AD9779A are dual DACs with
internal complex modulators built into the interpolating filter
response. In dual channel mode, the devices expect the real and
imaginary components of a complex signal at Digital Input Port 1
and Digital Input Port 2 (I and Q, respectively). The DAC outputs
then represent the real and imaginary components of the input
signal, modulated by the complex carrier (f
With Register 0x02, Bit 6, set, the device accepts interleaved data
on Port 1 in the I, Q, I, Q … sequence. Note that in interleaved
mode, the channel data rate at the beginning of the I and Q data
paths is now half the input data rate because of the interleaving.
The maximum input data rate is still subject to the maximum
specification of the device. This limits the synthesis bandwidth
available at the input in interleaved mode.
With Register 0x02, Bit 5 (the real mode bit), set, the Q channel
and the internal I and Q digital modulation are turned off. The
output spectrum at the I DAC then represents the signal at
Digital Input Port 1, interpolated by 1×, 2×, 4×, or 8×.
The general recommendation is that if the desired signal is
within ±0.4 × f
this, the shifted filter mode should be used. In any situation, the
total bandwidth of the signal is less than 0.8 × f
Figure 67. Interpolation/Modulation Combination of 3f
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DATA
10
0
–4
. If the shifted mode filter response is then selected,
DATA
DATA
–3
, ±1.5 f
, use the nonshifted filter mode. Outside of
AD9776A/AD9778A/AD9779A
–2
DATA
f
OUT
, ±2.5 f
–1
(× Input Data Rate)
0
DATA
, and ±3.5 f
1
DATA
DAC
. However, the signal
/2, f
2
DATA
DAC
DATA
/4, or f
DAC
.
. Switching to
3
/8 Filter
DAC
4
/8).
DATA