AD9866BCPZ Analog Devices Inc, AD9866BCPZ Datasheet - Page 4

• Manufacturer Part Number: AD9866BCPZ
• Description: IC,MODEM CIRCUIT,ANALOG FRONT END,CMOS,LLCC,64PIN,PLASTIC
• Manufacturer: Analog Devices Inc

Specifications of AD9866BCPZ

• Rf Type: HPNA, VDSL
• Features: 12-bit ADC(s), 12-bit DAC(s)
• Package / Case: 64-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Frequency: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9866
Parameter
PLL CLK MULTIPLIER
1
2
3
4
5
6
7
Rx PATH SPECIFICATIONS
AVDD = 3.3 V ± 5%, DVDD = CLKVDD = DRVDD = 3.3 V ± 10%; half- or full-duplex operation with CONFIG = 0 default power bias
settings, unless otherwise noted.
Table 2.
Parameter
Rx INPUT CHARACTERISTICS
RxPGA CHARACTERISTICS
RxLPF CHARACTERISTICS
ADC DC CHARACTERISTICS
Rx PATH LATENCY
Gain error and gain temperature coefficients are based on the ADC only (with a fixed 1.23 V external reference and a 1 V p-p differential analog input).
TxDAC IOUTFS = 20 mA, differential output with 1:1 transformer with source and load termination of 50 Ω, F
IOUN full-scale current = 80 mA, f
Use external amplifier to drive additional load.
Internal VCO operates at 200 MHz , set to divide-by-1.
Because CLKOUT2 is a divided down version of OSCIN, its jitter is typically equal to OSCIN.
CLKOUT2 is an inverted replica of OSCIN, if set to divide-by-1.
−3 dB Bandwidth
Stop Band Rejection (0.289 f
OSCIN Frequency Range
Internal VCO Frequency Range
Duty Cycle
OSCIN Impedance
CLKOUT1 Jitter
CLKOUT2 Jitter
CLKOUT1 and CLKOUT2 Duty Cycle
Input Voltage Span (RxPGA gain = −10 dB)
Input Voltage Span (RxPGA gain = +48 dB)
Input Common-Mode Voltage
Differential Input Impedance
Input Bandwidth (with RxLPF Disabled, RxPGA = 0 dB)
Input Voltage Noise Density (RxPGA Gain = 36 dB, f
Input Voltage Noise Density (RxPGA Gain = 48 dB, f
Minimum Gain
Maximum Gain
Gain Step Size
Gain Step Accuracy
Gain Range Error
Cutoff Frequency (f
Attenuation at 55.2 MHz with f
Pass-Band Ripple
Settling Time to 5 dB RxPGA Gain Step @ f
Settling Time to 60 dB RxPGA Gain Step @ f
Resolution
Conversion Rate
Full-Duplex Interface
Half-Duplex Interface
5
6
1
−3 dBF
) range
OSCIN
OSCIN
= 80 MHz, f
−3 dBF
to 0.711 f
7
= 21 MHz
DAC
=160 MHz, 2× interpolation.
ADC
OSCIN
ADC
= 50 MSPS
)
= 50 MSPS
−3 dBF
−3 dBF
= 26 MHz)
= 26 MHz)
Rev. A | Page 4 of 48
Temp
Full
Full
Full
Full
25°C
25°C
25°C
Full
Temp
Full
Full
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
Full
25°C
25°C
25°C
25°C
NA
FULL
Full
Full
Full
Test Level
III
III
III
III
III
III
III
III
III
III
III
III
III
III
III
III
III
NA
II
V
V
Test Level
V
V
IV
IV
II
V
III
III
III
OUT
= 5 MHz, 4× interpolation.
Min
5
20
40
45
Min
15
5
Typ
6.33
8
1.3
400
4.0
53
2.7
2.4
−12
48
1
0.5
20
±1
20
100
12
10.5
10.0
Monotonic
Typ
50
100//3
12
6
0.1202
Max
80
200
60
55
Max
35
80
Unit
f
dB
MHz
MHz
%
ΜΩ//pF
ps rms
ps rms
%
OUT
Unit
V p-p
mV p-p
V
Ω
pF
MHz
nV/rtHz
nV/rtHz
dB
dB
dB
dB
dB
MHz
dB
dB
ns
ns
Bits
MSPS
Cycles
Cycles
/f
DAC