ADA4310-1ARHZ-R7 Analog Devices Inc, ADA4310-1ARHZ-R7 Datasheet - Page 11
![IC,Operational Amplifier,DUAL,BIPOLAR,TSSOP,10PIN,PLASTIC](/photos/6/60/66034/505-10-msop_sml.jpg)
ADA4310-1ARHZ-R7
Manufacturer Part Number
ADA4310-1ARHZ-R7
Description
IC,Operational Amplifier,DUAL,BIPOLAR,TSSOP,10PIN,PLASTIC
Manufacturer
Analog Devices Inc
Datasheet
1.ADA4310-1ACPZ-R7.pdf
(16 pages)
Specifications of ADA4310-1ARHZ-R7
Amplifier Type
Current Feedback
Number Of Circuits
2
Slew Rate
820 V/µs
-3db Bandwidth
190MHz
Current - Input Bias
6µA
Voltage - Input Offset
1000µV
Current - Supply
7.6mA
Voltage - Supply, Single/dual (±)
5 V ~ 12 V, ±2.5 V ~ 6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
10-MSOP, Micro10™, 10-uMAX, 10-uSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Output Type
-
Current - Output / Channel
-
Gain Bandwidth Product
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
APPLICATION INFORMATION
FEEDBACK RESISTOR SELECTION
The feedback resistor has a direct impact on the closed-loop
bandwidth and stability of the current feedback op amp.
Reducing the resistance below the recommended value can
make the amplifier response peak and even become unstable.
Increasing the size of the feedback resistor beyond the recom-
mended value reduces the closed-loop bandwidth. Table 6
provides a convenient reference for quickly determining the
feedback and gain resistor values, and the corresponding
bandwidth, for common gain configurations. The recommended
value of feedback resistor for the ADA4310-1 is 499 Ω.
Table 6. Recommended Values and Frequency Performance
Gain
+2
+5
+5
+10
+20
1
POWER CONTROL MODES OF OPERATION
The ADA4310-1 features four power modes: full power, ¾
power, ½ power, and shutdown. The power modes are
controlled by two logic pins, PD0 and PD1. The power-down
control pins are compatible with standard 3 V and 5 V CMOS
logic. Table 7 shows the various power modes and associated
logic states. In the power-down mode, the output of the
amplifier goes into a high-impedance state.
Table 7. Power Modes
PD1
Low
Low
High
High
EXPOSED THERMAL PAD CONNECTIONS
The exposed thermal pad on the 10-lead MSOP package is both
the reference for the PD pins and the only electrical connection
for the negative supply voltage. Therefore, in the 10-lead MSOP
package, the ADA4310-1 can only be used on a single supply.
The exposed thermal pad MUST be connected to ground.
Failure to do so will render the part inoperable.
The 4 mm × 4 mm 16-lead LFCSP package has dedicated pins
for both the positive and negative supplies, and it can be used
in either single supply or dual supply applications. There is no
electrical connection for the exposed thermal pad. Although the
pad could theoretically be connected to any potential, it is still
typically connected to ground.
Conditions: V
PD0
Low
High
Low
High
S
R
499
499
1k
499
499
= ±6 V, T
F
(Ω)
Power Down
Power Mode
Full Power
¾ Power
½ Power
A
= 25°C, R
R
499
124
249
55.4
26.1
G
L
= 50 Ω, PD1, PD0 = 0,0.
(Ω)
Total Supply
Current (mA)
15.2
11.2
7.8
1.3
−3 dB SS BW (MHz)
230
190
125
160
115
Output
Impedance
Low
Low
Low
High
Rev. 0 | Page 11 of 16
1
A requirement for both packages is that the thermal pad be
connected to a solid plane with low thermal resistance, ensuring
adequate heat transfer away from the die and into the board.
POWER LINE APPLICATION
Applications (that is, powerline AV modems) requiring greater
than 10 dBm peak power should consider using an external line
driver, such as the ADA4310-1. Figure 21 shows an example
interface between the TxDAC® output and ADA4310-1 biased
for single-supply operation. The TxDAC’s peak-to-peak differ-
ential output voltage swing should be limited to 2 V p-p, with
the ADA4310-1’s gain configured to realize the additional
voltage gain required by the application. A low-pass filter
should be considered to filter the DAC images inherent in the
signal reconstruction process. In addition, dc blocking capacitors
are required to level-shift the TxDAC’s output signal to the
common-mode level of the ADA4310-1 (that is, AVDD/2).
0.1µF
Figure 21. TxDAC Output Directly via Center-Tap Transformer
0dB TO –7.5dB
TxDAC
R
SET
IOUTP+
IOUTP–
OPTIONAL
LCLPF
AVDD/2
ADA4310-1
ADA4310-1
ADA4310-1
1/2
1/2