ADAU1701JSTZ-RL Analog Devices Inc, ADAU1701JSTZ-RL Datasheet - Page 35

IC,Audio Processor,QFP,48PIN,PLASTIC

ADAU1701JSTZ-RL

Manufacturer Part Number
ADAU1701JSTZ-RL
Description
IC,Audio Processor,QFP,48PIN,PLASTIC
Manufacturer
Analog Devices Inc
Series
SigmaDSP®r
Type
Audio Processorr
Datasheet

Specifications of ADAU1701JSTZ-RL

Design Resources
Analog Audio Input, Class-D Output with ADAU1701, SSM2306, and ADP3336 (CN0162)
Applications
Automotive, Monitors, MP3
Mounting Type
Surface Mount
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-ADAU1701MINIZ - BOARD EVAL SIGMADSP AUD ADAU1701EVAL-ADAU1701EBZ - BOARD EVAL FOR ADAU1701
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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CONTROL REGISTER DETAILS
2048 TO 2055 (0x0800 TO 0x0807)—INTERFACE
REGISTERS
The interface registers are used in self-boot mode to save
parameters that need to be written to the external EEPROM.
The ADAU1701 then recalls these parameters from the
EEPROM after the next reset or power-up. Therefore, system
parameters such as volume and EQ settings can be saved during
power-down and recalled the next time the system is turned on.
There are eight 32-bit interface registers, which allow eight 28-bit
(plus zero-padding) parameters to be saved. The parameters to
Table 33. Interface Register Bit Map
D31
D15
0
IF15
Table 34.
Bit Name
IF[27:0]
D30
D14
0
IF14
D29
D13
0
IF13
D28
D12
0
IF12
D27
D11
IF27
IF11
Description
Interface register 28-bit parameter
D26
D10
IF26
IF10
D25
D9
IF25
IF09
D24
D8
IF24
IF08
Rev. A | Page 35 of 56
D23
D7
IF23
IF07
D22
D6
IF22
IF06
be saved in these registers are selected in the graphical
programming tools. These registers are updated with their
corresponding parameter RAM data once per sample period.
An edge, which can be set to be either rising or falling, triggers
the ADAU1701 to write the current contents of the interface
registers to the EEPROM. See the Self-Boot section for details.
The user can write directly to the interface registers after the
interface registers control port write mode (IFCW) in the DSP core
control register has been set. In this mode, the data in the registers
is written from the control port, not from the DSP core.
IF21
IF05
D21
D5
D20
D4
IF20
IF04
D19
D3
IF19
IF03
D18
D2
IF18
IF02
D17
D1
IF17
IF01
D16
D0
IF16
IF00
ADAU1701
Default
0x0000
0x0000

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