ADAV803ASTZ-REEL Analog Devices Inc, ADAV803ASTZ-REEL Datasheet - Page 34

• Manufacturer Part Number: ADAV803ASTZ-REEL
• Description: IC,Soundcard Circuits,QFP,64PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Type: Audio Codecr

Specifications of ADAV803ASTZ-REEL

• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: No
• Dynamic Range, Adcs / Dacs (db) Typ: 102 / 101
• Voltage - Supply, Analog: 3 V ~ 3.6 V
• Voltage - Supply, Digital: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADAV803EBZ - BOARD EVALUATION FOR ADAV803
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADAV803
Record Port Control—Address 0000110 (0x06)
Table 25. Record Port Control Register Bit Map
7
Reserved
Table 26. Record Port Control Register Bit Descriptions
Bit Name
CLKSRC[1:0]
WLEN[1:0]
SPMODE[1:0]
Auxiliary Output Port—Address 0000111 (0x07)
Table 27. Auxiliary Output Port Register Bit Map
7
Reserved
Table 28. Auxiliary Output Port Register Bit Descriptions
Bit Name
CLKSRC[1:0]
WLEN[1:0]
SPMODE[1:0]
6
Reserved
6
Reserved
Selects the clock source for generating the OAUXLRCLK and OAUXBCLK.
Selects the serial output word length.
Selects the serial format of the auxiliary record port.
Description
Selects the clock source for generating the OLRCLK and OBCLK.
Selects the serial output word length.
Selects the serial format of the record port.
Description
00 = Auxiliary record port is a slave.
01 = Recovered PLL clock.
10 = Internal Clock 1.
11 = Internal Clock 2.
00 = 24 bits.
01 = 20 bits.
10 = 18 bits.
11 = 16 bits.
00 = Left-justified.
01 = I
10 = Reserved.
11 = Right-justified.
00 = Record port is a slave.
01 = Recovered PLL clock.
10 = Internal Clock 1.
11 = Internal Clock 2.
00 = 24 bits.
01 = 20 bits.
10 = 18 bits.
11 = 16 bits.
00 = Left-justified.
01 = I
10 = Reserved.
11 = Right-justified.
2
2
S.
S.
5
CLKSRC1
5
CLKSRC1
4
CLKSRC0
4
CLKSRC0
Rev. A | Page 34 of 60
3
WLEN1
3
WLEN1
2
WLEN0
2
WLEN0
1
SPMODE1
1
SPMODE1
0
SPMODE0
0
SPMODE0