ADF7025BCPZ-RL7 Analog Devices Inc, ADF7025BCPZ-RL7 Datasheet - Page 36

IC,RF Modulator/Demodulator,LLCC,48PIN,PLASTIC

ADF7025BCPZ-RL7

Manufacturer Part Number
ADF7025BCPZ-RL7
Description
IC,RF Modulator/Demodulator,LLCC,48PIN,PLASTIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADF7025BCPZ-RL7

Frequency
431MHz ~ 464MHz, 862MHz ~ 870MHz and 902MHz ~ 928MHz
Data Rate - Maximum
384kbps
Modulation Or Protocol
FSK
Applications
Keyless Entery, Home Automation, Wireless Audio/Video
Power - Output
-20dBm ~ 13dBm
Sensitivity
-104dBm
Voltage - Supply
2.3 V ~ 3.6 V
Current - Receiving
19mA
Current - Transmitting
28mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LFCSP
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Modulation Type
FSK
Product Depth (mm)
7mm
Product Length (mm)
7mm
Operating Supply Voltage (min)
2.3V
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-ADF70XXEKZ1 - KIT DEV ADF702X FOR BF533EZKITEVAL-ADF7025DBZ1 - BOARD EVAL ADF7025 902-928MHZ
Memory Size
-
Lead Free Status / Rohs Status
Compliant
ADF7025
REGISTER 8—POWER-DOWN TEST REGISTER
Register 8—Power-Down Test Register Comments
• For a combined LNA/PA matching network, Bit R8_DB12 should always be set to 0. This is the power-up default condition.
• It is not necessary to write to this register under normal operating conditions.
PD7
0
1
PA (Rx MODE)
PA OFF
PA ON
DB15
SW1
0
1
LR2
X
X
Tx/Rx SWITCH
DEFAULT (ON)
OFF
DB14
LR1
0
1
DB13
PD7
RSSI MODE
RSSI OFF
RSSI ON
PD6
0
1
DB12
SW1
DEMOD ENABLE
DEMOD OFF
DEMOD ON
DB11
LR2
LOG AMP/
RSSI
DB10
Figure 47. Register 8—Power-Down Test Register
LR1
DB9
PD6
PD5
0
1
Rev. A | Page 36 of 44
DB8
PD5
ADC ENABLE
ADC OFF
ADC ON
DB7
PD4
PD4
0
1
DB6
PD3
FILTER ENABLE
FILTER OFF
FILTER ON
PD3
0
1
DB5
PD2
LNA/MIXER ENABLE
LNA/MIXER OFF
LNA/MIXER ON
DB4
PD1
PLE1
(FROM REG 0)
0
0
0
0
1
C4(1)
DB3
C3(0)
DB2
CONTROL
BITS
C2(0)
DB1
PD2
0
0
1
1
X
PD1
0
1
0
1
X
C1(0)
DB0
LOOP
CONDITION
VCO/PLL OFF
PLL ON
VCO ON
PLL/VCO ON
PLL/VCO ON

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