ADP1871ACPZ-0.3-R7 Analog Devices Inc, ADP1871ACPZ-0.3-R7 Datasheet - Page 18
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ADP1871ACPZ-0.3-R7
Manufacturer Part Number
ADP1871ACPZ-0.3-R7
Description
300kHz, Light Load Eff Enabled
Manufacturer
Analog Devices Inc
Datasheet
1.ADP1870-0.3-EVALZ.pdf
(44 pages)
Specifications of ADP1871ACPZ-0.3-R7
Frequency - Max
300kHz
Pwm Type
Current Mode
Number Of Outputs
1
Duty Cycle
84%
Voltage - Supply
2.95 V ~ 20 V
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
-40°C ~ 125°C
Package / Case
10-WFDFN, CSP Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ADP1871ACPZ-0.3-R7
ADP1871ACPZ-0.3-R7TR
ADP1871ACPZ-0.3-R7TR
ADP1870/ADP1871
ADP1870/ADP1871 BLOCK DIAGRAM
COMP/
VREG
EN
FB
C
I
SS
SS
REF_ZERO
LOWER
CLAMP
COMP
SS_REF
ADP1870/ADP1871
ENABLE BLOCK
0.6V
PRECISION
REF_ZERO
ERROR
AMP
SS
COMP
AND REFERENCE
AMP
PWM
CS
BIAS BLOCK
REF
Figure 65. ADP1870/ADP1871 Block Diagram
LDO
PSM
TO ENABLE
ALL BLOCKS
GND
I
COMP
REV
CS GAIN SET
Rev. A | Page 18 of 44
INFORMATION
TON
BG_REF
PSM
IN_SS
PWM
I
t
REV
ON
ADC
MACHINE
TIMER
STATE
VREG
DH_LO
DL_LO
DRVH
DRVL
SW
RES DETECT AND
GAIN SET
SW
C
VREG
I
0.4V
LEVEL
R (TRIMMED)
SHIFT
SW FILTER
t
ON
= 2RC(V
HS
LS
OUT
VREG
800kΩ
/V
IN
)
300kΩ
8kΩ
VIN
BST
DRVH
SW
DRVL
PGND