ADP1871ACPZ-0.3-R7 Analog Devices Inc, ADP1871ACPZ-0.3-R7 Datasheet - Page 38

• Manufacturer Part Number: ADP1871ACPZ-0.3-R7
• Description: 300kHz, Light Load Eff Enabled
• Manufacturer: Analog Devices Inc

Specifications of ADP1871ACPZ-0.3-R7

• Frequency - Max: 300kHz
• Pwm Type: Current Mode
• Number Of Outputs: 1
• Duty Cycle: 84%
• Voltage - Supply: 2.95 V ~ 20 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 10-WFDFN, CSP Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ADP1871ACPZ-0.3-R7; ADP1871ACPZ-0.3-R7TR

ADP1870/ADP1871
(component geometry permitting) that minimizes the area of
flux change as the event switches between D and 1 − D.
DIFFERENTIAL SENSING
Because the ADP1870/ADP1871 operate in valley current-
mode control, a differential voltage reading is taken across the
drain and source of the lower-side MOSFET. The drain of the
lower-side MOSFET should be connected as close as possible to
the SW pin (Pin 9) of the IC. Likewise, the source should be
connected as close as possible to the PGND pin (Pin 7) of the
IC. When possible, both of these track lines should be narrow
and away from any other active device or voltage/current path.
Figure 90. Primary Current Pathways During the On State of the Upper-Side
MOSFET (Left Arrow) and the On State of the Lower-Side MOSFET (Right Arrow)
VIN
SW
PGND
VOUT
Rev. A | Page 38 of 44
Differential sensing should also be applied between the
outermost output capacitor to the feedback resistor divider (see
Figure 88 and Figure 89). Connect the positive terminal of the
output capacitor to the top resistor (R
terminal of the output capacitor to the negative terminal of the
bottom resistor, which connects to the analog ground plane as
well. Both of these track lines, as previously mentioned, should
be narrow and away from any other active device or voltage/
current path.
Figure 91. Drain/Source Tracking Tapping of the Lower-Side MOSFET for CS
LAYER 1: SENSE LINE FOR SW
(DRAIN OF LOWER MOSFET)
Amp Differential Sensing (Yellow Sense Line on Layer 2)
LAYER 1: SENSE LINE FOR PGND
(SOURCE OF LOWER MOSFET)
T
). Connect the negative