ADP1871ACPZ-0.3-R7 Analog Devices Inc, ADP1871ACPZ-0.3-R7 Datasheet - Page 3

• Manufacturer Part Number: ADP1871ACPZ-0.3-R7
• Description: 300kHz, Light Load Eff Enabled
• Manufacturer: Analog Devices Inc

Specifications of ADP1871ACPZ-0.3-R7

• Frequency - Max: 300kHz
• Pwm Type: Current Mode
• Number Of Outputs: 1
• Duty Cycle: 84%
• Voltage - Supply: 2.95 V ~ 20 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 10-WFDFN, CSP Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ADP1871ACPZ-0.3-R7; ADP1871ACPZ-0.3-R7TR

SPECIFICATIONS
All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC). V
V
unless otherwise specified.
Table 1.
Parameter
POWER SUPPLY CHARACTERISTICS
INTERNAL REGULATOR
SOFT START
ERROR AMPLIFER
CURRENT-SENSE AMPLIFIER GAIN
SWITCHING FREQUENCY
BST
High Input Voltage Range
Quiescent Current
Shutdown Current
Undervoltage Lockout
UVLO Hysteresis
CHARACTERISTICS
VREG Operational Output Voltage
VREG Output in Regulation
Load Regulation
Line Regulation
V
Short VREG to PGND
Soft Start Period
FB Regulation Voltage
Transconductance
FB Input Leakage Current
Programming Resistor (RES)
ADP1870ARMZ-0.3/
IN
− V
Value from DRVL to PGND
ADP1871ARMZ-0.3 (300 kHz)
On-Time
Minimum On-Time
Minimum Off-Time
to V
SW
REG
= V
Dropout Voltage
REG
− V
RECT_DROP
(see Figure 40 to Figure 42). V
Symbol
V
I
I
I
UVLO
V
V
G
I
Q_REG
REG,SD
BST,SD
FB, Leak
IN
REG
FB
m
+ I
+
Q_BST
Conditions
C
ADP1870ARMZ-0.3/ADP1871ARMZ-0.3 (300 kHz)
ADP1870ARMZ-0.6/ADP1871ARMZ-0.6 (600 kHz)
ADP1870ARMZ-1.0/ADP1871ARMZ-1.0 (1.0 MHz)
V
COMP/EN < 285 mV
Rising V
Falling V
VREG should not be loaded externally because it is
intended to only bias internal circuitry.
C
ADP1870ARMZ-0.3/ADP1871ARMZ-0.3 (300 kHz)
ADP1870ARMZ-0.6/ADP1871ARMZ-0.6 (600 kHz)
ADP1870ARMZ-1.0/ADP1871ARMZ-1.0 (1.0 MHz)
V
V
0 mA to 100 mA, V
0 mA to 100 mA, V
V
V
100 mA out of V
V
See Figure 58
T
T
T
V
RES = 47 kΩ ± 1%
RES = 22 kΩ ± 1%
RES = none
RES = 100 kΩ ± 1%
Typical values measured at 50% time points with 0 nF
at DRVH and DRVL; maximum values are guaranteed
by bench evaluation
V
V
84% duty cycle (maximum)
J
J
J
IN
FB
VREG
IN
IN
IN
IN
IN
FB
IN
IN
= +25°C
= −40°C to +85°C
= −40°C to +125°C
= 22 μF to PGND (at Pin 1)
= 7 V, 100 mA
= 12 V, 100 mA
= 7 V to 20 V, 20 mA
= 7 V to 20 V, 100 mA
= 20 V
= 5 V, V
= 20 V
= 1.5 V, no switching
= 0.6 V, COMP/EN = released
= 1 μF to PGND, 0.22 μF to GND, V
IN
IN
Rev. A | Page 3 of 44
IN
(see Figure 35 for temperature variation)
from operational state
OUT
= 12 V. The specifications are valid for T
= 2 V, T
REG
IN
IN
, V
= 7 V
= 20 V
J
1
IN
= 25°C
≤ 5 V
IN
= 2.95 V to 20 V
J
= −40°C to +125°C,
Min
2.95
2.95
3.25
2.75
2.75
3.05
4.8
4.8
596
594.2
320
2.7
5.5
11
22
1120
ADP1870/ADP1871
REG
Typ
12
12
12
1.1
190
2.65
190
5
5
5
4.981
4.982
32
33
2.5
2.0
300
229
3.0
600
600
600
496
1
3
6
12
24
300
1200
146
340
= 5 V,
Max
20
20
20
280
5.5
5.5
5.5
5.16
5.16
415
320
604
605.8
670
50
3.3
6.5
13
26
1280
190
400
Unit
V
V
V
mA
μA
V
mV
V
V
V
V
V
mV
mV
mV
mV
mV
mA
ms
mV
mV
mV
μS
nA
V/V
V/V
V/V
V/V
kHz
ns
ns
ns