AM29F080B-90EI Spansion Inc., AM29F080B-90EI Datasheet - Page 5

• Manufacturer Part Number: AM29F080B-90EI
• Description: Flash Memory IC
• Manufacturer: Spansion Inc.

Specifications of AM29F080B-90EI

• Memory Size: 8Mbit
• Memory Configuration: 1M X 8
• Ic Interface Type: Parallel
• Access Time: 80ns
• Memory Case Style: TSOP
• No. Of Pins: 40
• Mounting Type: Surface Mount
• Peak Reflow Compatible (260 C): No
• Supply Voltage Max: 5.5V
• Rohs Compliant: No
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 5
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 7
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . . 8
Command Definitions . . . . . . . . . . . . . . . . . . . . . . 12
Write Operation Status . . . . . . . . . . . . . . . . . . . . . 17
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . 21
November 1, 2006 21503G5
Requirements for Reading Array Data ..................................... 8
Writing Commands/Command Sequences .............................. 8
Program and Erase Operation Status ...................................... 8
Standby Mode .......................................................................... 9
RESET#: Hardware Reset Pin ................................................. 9
Output Disable Mode ................................................................ 9
Autoselect Mode ..................................................................... 10
Sector Group Protection/Unprotection .................................... 11
Temporary Sector Group Unprotect ....................................... 11
Hardware Data Protection ...................................................... 12
Reading Array Data ................................................................ 12
Reset Command ..................................................................... 12
Autoselect Command Sequence ............................................ 12
Byte Program Command Sequence ....................................... 13
Chip Erase Command Sequence ........................................... 13
Sector Erase Command Sequence ........................................ 14
Erase Suspend/Erase Resume Commands ........................... 14
Command Definitions ............................................................. 16
DQ7: Data# Polling ................................................................. 17
RY/BY#: Ready/Busy# ........................................................... 18
DQ6: Toggle Bit I .................................................................... 18
DQ2: Toggle Bit II ................................................................... 18
Reading Toggle Bits DQ6/DQ2 .............................................. 18
DQ5: Exceeded Timing Limits ................................................ 19
DQ3: Sector Erase Timer ....................................................... 19
Table 1. Am29F080B Device Bus Operations ..................................8
Table 1. Am29F080B Sector Address Table ...................................10
Table 2. Am29F080B Autoselect Codes (High Voltage Method) ....10
Table 3. Sector Group Addresses ...................................................11
Figure 1. Temporary Sector Group Unprotect Operation ................11
Low V
Write Pulse “Glitch” Protection ........................................................12
Logical Inhibit ..................................................................................12
Power-Up Write Inhibit ....................................................................12
Figure 2. Program Operation ..........................................................13
Figure 3. Erase Operation ...............................................................15
Table 4. Am29F080B Command Definitions ..................................16
Figure 4. Data# Polling Algorithm ...................................................17
Figure 5. Toggle Bit Algorithm .........................................................19
Table 5. Write Operation Status ......................................................20
CC
Write Inhibit ......................................................................12
D A T A S H E E T
Am29F080B
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . 21
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 22
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Key to Switching Waveforms . . . . . . . . . . . . . . . 23
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 24
Erase and Programming Performance
Latchup Characteristic . . . . . . . . . . . . . . . . . . . . 33
TSOP and SO Pin Capacitance . . . . . . . . . . . . . 33
Data Retention . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 34
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 36
TTL/NMOS Compatible .......................................................... 22
CMOS Compatible .................................................................. 22
Read-only Operations ............................................................. 24
Hardware Reset (RESET#) .................................................... 25
Erase and Program Operations .............................................. 26
Temporary Sector Unprotect .................................................. 30
Erase and Program Operations .............................................. 31
SO 044—44-Pin Small Outline Package ................................ 34
TS 040—40-Pin Standard Thin Small Outline Package ......... 35
Revision A (July 1997) ............................................................ 36
Revision B (January 1998) ..................................................... 36
Revision C (January 1998) ..................................................... 36
Revision D (May 1998) ........................................................... 36
Revision E (January 1999) ..................................................... 36
Revision E+1 (March 23, 1999) .............................................. 36
Revision E+2 (April 9, 1999) ................................................... 36
Revision F (November 15, 1999) ............................................ 36
Revision F+1 (May 18, 2000) ................................................. 36
Revision G (December 4, 2000) ............................................. 36
Revision G+1 (January 3, 2002) ............................................. 37
Revision G+2 (June 14, 2004) ................................................ 37
Revision G3 (December 22, 2005) ......................................... 37
Revision G4 (May 19, 2006) ................................................... 37
Revision G5 (November 1, 2006) ........................................... 37
Figure 6. Maximum Negative Overshoot Waveform ...................... 21
Figure 7. Maximum Negative Overshoot Waveform ...................... 21
Figure 8. Test Setup ....................................................................... 23
Table 2. Test Specifications ........................................................... 23
Figure 9. Read Operation Timings ................................................. 24
Figure 10. RESET# Timings .......................................................... 25
Figure 11. Program Operation Timings .......................................... 27
Figure 12. Chip/Sector Erase Operation Timings .......................... 28
Figure 13. Data# Polling Timings (During Embedded Algorithms) . 29
Figure 14. Toggle Bit Timings (During Embedded Algorithms) ...... 29
Figure 15. DQ2 vs. DQ6 ................................................................. 30
Figure 16. Temporary Sector Group Unprotect Timing Diagram ... 30
Alternate CE# Controlled Writes .................................................... 31
Figure 17. Alternate CE# Controlled Write Operation Timings ...... 32
. . . . . . 33
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