CS4351-DZZR Cirrus Logic Inc, CS4351-DZZR Datasheet - Page 22
CS4351-DZZR
Manufacturer Part Number
CS4351-DZZR
Description
IC,D/A CONVERTER,DUAL,24-BIT,TSSOP,20PIN
Manufacturer
Cirrus Logic Inc
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)
4.10
4.10.1
4.10.2
INCR
7
0
Memory Address Pointer (MAP)
INCR (AUTO MAP INCREMENT ENABLE)
Default = ‘0’
0 - Disabled
1 - Enabled
MAP (MEMORY ADDRESS POINTER)
Default = ‘0000’
4. Write the desired data to the register pointed to by the MAP.
5. If the INCR bit (see
6. If the INCR bit is set to 0 and further SPI writes to other registers are desired, it is necessary to bring
are written, then bring CS high.
CS high, and follow the procedure detailed from step 1. If no further writes to other registers are de-
sired, bring CS high.
Reserved
6
0
CS
CCLK
CDIN
Reserved
5
0
Section
Figure 10. Control Port Timing, SPI mode
M AP = M em ory Address Pointer
ADDRESS
1001100
CHIP
4.9.1) is set to 1, repeat the previous step until all the desired registers
Reserved
4
0
R/W
MAP
MAP3
3
0
byte 1
M SB
DATA
MAP2
2
0
byte n
LSB
MAP1
1
0
CS4351
MAP0
DS566F1
0
0