CY7B952-SXCT Cypress Semiconductor Corp, CY7B952-SXCT Datasheet
CY7B952-SXCT
Specifications of CY7B952-SXCT
Related parts for CY7B952-SXCT
CY7B952-SXCT Summary of contents
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... Transceiver PMC-Sierra PM5343STXC PM5344SPTX • 3901 North First Street • San Jose CY7B952 SOIC Top View 1 24 RCLK– 23 RCLK RSER– RSER LFI CY7B952 TCLK– TCLK TSER+ 12 TSER– 13 Path Overhead PMC-Sierra , CA 95134 • 408-943-2600 Revised March 19, 2010 [+] Feedback ...
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... When LOOP is LOW, the Transmit input data stream (TSER±) is used by the Receive PLL for clock and data recovery. Document #: 38-02018 Rev. *D and RIN– left unconnected, the entire Receive PLL will be powered down. CC and TSER– CY7B952 . Page [+] Feedback ...
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... CC V Ground. SS Description The CY7B952 Serial SONET/SDH Transceiver (SST) is used in SONET/SDH and ATM applications to recover clock and data information from a 155.52-MHz or 51.84-MHz NRZ (Non Return to Zero) or NRZI (Non Return to Zero Invert on ones) serial data stream. This device also provides a bit-rate Transmit clock, from a byte rate source through the use of a frequency multiplier PLL, and differential data buffering for the Transmit side of the system ...
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... SONET/SDH system such as a SONET/SDH switch. The SST provides the recovered clock and data to a serial to parallel converter and SONET/SDH Transport Overhead Processor such as the PMC-Sierra PM5343 STXC. The parallel data is then passed to a SONET/SDH Path Overhead Processor such as the PMC-Sierra PM5344 SPTX. CY7B952 . CC Page [+] Feedback ...
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... IN IHE(MAX) TSER/RIN IHE(MAX) REFCLK/ ILE(MIN) TSER/RIN ILE(MIN) TSER/RIN REFCLK TSER/RIN REFCLK CD TSER/RIN REFCLK CD (ECL) CD (Disable) T > 0°C /2. CC CY7B952 [ ± 10% 0°C to +70°C Min. Max. Unit 2 −0.5 0.8 V μA +0.5 +200 −10 μA +10 −50 μA +50 −500 μA 2.4 V 0.45 V − ...
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... [7] (b) ECL AC Test Load V IHE 80% 2.0V 20% 1.0V V ILE < < (d) ECL Input Test Waveform Description MODE=LOW MODE=HIGH MODE=LOW MODE=HIGH [6] [6] [ where x represents the number of ECL output pairs activated. CCT CCE CY7B952 Min. Max. Unit − 0. − 0.0 0. 7 Max. Unit = 5 ...
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... Jitter Generation of RX PLL −3 dB Gain Bandwidth of RX PLL f −3dB (Jitter Transfer Bandwidth) −3 dB Gain Bandwidth of RX PLL f −3dB (Jitter Transfer Bandwidth) Gpeak Maximum Peaking of RX PLL Switching Waveforms for the CY7B952 SONET/SDH Serial Transceiver t RPWL REFCLK TSER (RIN ) t PD TOUT (ROUT ) t ...
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... Switching Waveforms for the CY7B952 SONET/SDH Serial Transceiver RIN Ordering Information Speed (ns) Ordering Code 25 CY7B952-SXC CY7B952-SXCT Ordering Code Definitions CY 7B XXX - XX C Document #: 38-02018 Rev − − Package Name Package Type S13 24-Pin (300-Mil) Molded SOIC S13 24-Pin (300-Mil) Molded SOIC ...
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... DOES INCLUDE MOLD MISMATCH AND ARE MEASURED AT THE MOLD PARTING LINE. MOLD PROTRUSION/END FLASH SHALL NOT EXCEED 0.010 in (0.254 mm) PER SIDE MIN. 3. DIMENSIONS IN INCHES MAX. 4. PACKAGE WEIGHT 0.65gms * 0.394[10.007] 0.419[10.642] SEATING PLANE 0.092[2.336] 0.105[2.667] 0.004[0.101] * CY7B952 * 0.0091[0.231] 0.015[0.381] 0.0125[0.317] 0.050[1.270] 51-85025 *D Page [+] Feedback ...
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... Change from Spec. number: 38-00502 to 38-02018 RBI Add power up requirements to maximum ratings information. BCD Removed Preliminary from the datasheet CGX Removed obsolete part and added the following parts: CY7B952-SXC and CY7B952-SXCT Updated package diagram Ordering Information update. Added Ordering Code Definitions. CY7B952 Page [+] Feedback ...