CY7C1370D-200AXCT Cypress Semiconductor Corp, CY7C1370D-200AXCT Datasheet - Page 28

CY7C1370D-200AXCT

CY7C1370D-200AXCT

Manufacturer Part Number
CY7C1370D-200AXCT
Description
CY7C1370D-200AXCT
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1370D-200AXCT

Format - Memory
RAM
Memory Type
SRAM - Synchronous
Memory Size
18M (512K x 36)
Speed
200MHz
Interface
Parallel
Voltage - Supply
3.135 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C1370D-200AXCT
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Document History Page
Document Number: 38-05555 Rev. *K
Document Title: CY7C1370D/CY7C1372D 18-Mbit (512 K × 36/1 M × 18) Pipelined SRAM with NoBL™ Architecture
Document Number: 38-05555
REV.
*C
*D
*G
*H
*A
*B
*E
*F
*J
**
*I
ECN No.
2756940
2896585
2906603
3055192
254509
276690
288531
326078
370734
416321
475677
Submission
08/27/2009
03/21/2010
04/07/2010
10/11/2010
See ECN
See ECN
See ECN
See ECN
See ECN
See ECN
See ECN
Date
Change
Orig. of
RKF
NXR
VKN
VKN
VBL
SYT
NJY
NJY
NJY
PCI
PCI
New data sheet
Changed TQFP pkg to Lead-free TQFP in Ordering Information section
Added comment of Lead-free BG and BZ packages availability
Edited description under “IEEE 1149.1 Serial Boundary Scan (JTAG)” for
non-compliance with 1149.1
Added lead-free information for 100-pin TQFP, 119 BGA and 165 FBGA
Packages
Address expansion pins/balls in the pinouts for all packages are modified
as per JEDEC standard
Added description on EXTEST Output Bus Tri-State
Changed description on the Tap Instruction Set Overview and Extest
Changed 
4.08 C/W respectively
Changed 
6.2 C/W respectively
Changed 
4.0 C/W respectively
Modified V
Removed shading from AC/DC Table and Selection Guide
Removed comment of ‘Lead-free BG packages availability’ below the
Ordering Information
Updated Ordering Information Table
Changed from Preliminary to final
Modified test condition in note# 17 from V
Converted from preliminary to final
Changed address of Cypress Semiconductor Corporation on Page# 1 from
“3901 North First Street” to “198 Champion Court”
Modified “Input Load” to “Input Leakage Current except ZZ and MODE” in
the
Electrical Characteristics Table
Changed three-state to tri-state
Changed the I
to –30 A and 5 A
Changed the I
to –5 A and 30 A
Changed V
Replaced Package Name column with Package Diagram in the Ordering
Information table
Updated Ordering Information Table
Added the Maximum Rating for Supply Voltage on V
Changed t
AC Switching Characteristics table.
Updated the Ordering Information table.
Included Soft Error Immunity Data
Modified Ordering Information table by including parts that are available and
modified the disclaimer for the Ordering information.
Removed obsolete parts from Ordering Information table. Updated package
diagram, data sheet template, and Sales, Solutions, and Legal Information
section.
Removed inactive part from Ordering Information table.
Updated
Ordering Information
TH
OL,
JA
JA
IH
JA
, t
X
< V
and 
and 
and 
V
X
TL
current values of MODE on page # 18 from –5 A and 30 A
OH
current values of ZZ on page # 18 from –30 A and 5 A
DD
from 25 ns to 20 ns and t
test conditions
JC
JC
JC
to V
for TQFP Package from 31 and 6 C/W to 28.66 and
for FBGA Package from 46 and 3 C/W to 20.7 and
for BGA Package from 45 and 7 C/W to 23.8 and
IH
Description of Change
< V
DD
and added
on page # 18
CY7C1370D, CY7C1372D
DDQ
Ordering Code
TDOV
< V
from 5 ns to 10 ns in TAP
DD
DDQ
to V
DDQ
Relative to GND
Definitions.
 V
Page 28 of 29
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