CY7C4245-15ASXC Cypress Semiconductor Corp, CY7C4245-15ASXC Datasheet - Page 9

• Manufacturer Part Number: CY7C4245-15ASXC
• Description: CY7C4245-15ASXC
• Manufacturer: Cypress Semiconductor Corp
• Series: CY7Cr

Specifications of CY7C4245-15ASXC

• Function: Synchronous
• Memory Size: 72K (4K x 18)
• Data Rate: 100MHz
• Access Time: 10ns
• Voltage - Supply: 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Configuration: Dual
• Density: 72Kb
• Access Time (max): 10ns
• Word Size: 18b
• Organization: 4Kx18
• Sync/async: Synchronous
• Expandable: Yes
• Bus Direction: Uni-Directional
• Clock Freq (max): 66.7MHz
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Supply Current: 45mA
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Switching Characteristics
Document Number: 001-45652 Rev. *A
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Notes
S
A
CLK
CLKH
CLKL
DS
DH
ENS
ENH
RS
RSR
RSF
PRT
RTR
OLZ
OE
OHZ
WFF
REF
PAFasynch
PAFsynch
PAEasynch
PAEsynch
13. C
14. C
15. Pulse widths less than minimum values are not allowed.
16. Values guaranteed by design, not currently tested.
17. t
Parameter
PAFasynch
L
L
= 30 pF for all AC parameters except for t
= 5 pF for t
Equivalent to:
, t
PAEasynch
OHZ
Clock Cycle Frequency
Data Access Time
Clock Cycle Time
Clock HIGH Time
Clock LOW Time.
Data Set-up Time
Data Hold Time
Enable Set-up Time
Enable Hold Time
Reset Pulse Width
Reset Recovery Time
Reset to Flag and Output Time
Retransmit Pulse Width
Retransmit Recovery Time
Output Enable to Output in Low Z
Output Enable to Output Valid
Output Enable to Output in High Z
Write Clock to Full Flag
Read Clock to Empty Flag
Clock to Programmable Almost-Full Flag
Clock to Programmable Almost-Full Flag
Clock to Programmable Almost-Empty Flag
Clock to Programmable Almost-Full Flag
(Asynchronous mode, V
(Synchronous mode, V
(Asynchronous mode, V
(Synchronous mode, V
.
, after program register write will not be valid until 5 ns + t
OUTPUT
OUTPUT
THÉVENIN EQUIVALENT
5V
INCLUDING
JIG AND
SCOPE
Description
[15]
Over the Operating Range
C
CC
L
CC
CC
Rth = 410Ω
Figure 5. AC Test Loads and Waveforms
CC
/SMODE tied to V
OHZ
R1 = 1.1KΩ
/SMODE tied to V
/SMODE tied to V
/SMODE tied to V
.
[16]
[16]
R2 =680Ω
Vth = 1.91V
[17]
CC
[17]
)
SS
SS
CC
)
)
)
PAF(E)
Min.
4.5
4.5
0.5
0.5
10
10
12
12
2
3
3
8
0
3
3
.
-10
Max.
100
10
12
12
8
7
7
8
8
8
8
GND
3.0V
≤ 3 ns
Min.
15
15
10
15
15
2
6
6
4
1
4
1
0
3
3
[13, 14]
-15
Max.
66.7
10
15
10
10
16
10
16
10
8
8
ALL INPUT PULSES
10%
90%
CY7C4425/4205/4215
CY7C4225/4235/4245
Min.
25
10
10
25
15
25
25
2
6
1
6
1
0
3
3
-25
Max.
40
15
25
12
12
15
15
20
15
20
15
Min.
35
14
14
35
20
35
35
2
7
2
7
2
0
3
3
90%
-35
10%
≤ 3 ns
Max.
28.6
Page 9 of 22
20
35
15
15
20
20
25
20
25
20
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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