CY7C4265-10ASXC Cypress Semiconductor Corp, CY7C4265-10ASXC Datasheet - Page 9

• Manufacturer Part Number: CY7C4265-10ASXC
• Description: IC,FIFO,16KX18,SYNCHRONOUS,CMOS,QFP,64PIN,PLASTIC
• Manufacturer: Cypress Semiconductor Corp
• Series: CY7Cr

Specifications of CY7C4265-10ASXC

• Function: Synchronous
• Memory Size: 288K (16K x 18)
• Data Rate: 100MHz
• Access Time: 8ns
• Voltage - Supply: 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Switching Waveforms
Document #: 38-06004 Rev. *G
Notes
17. The clocks (RCLK, WCLK) can be free-running during reset.
18. After reset, the outputs are LOW if OE = 0 and three-state if OE = 1.
19. When t
20. The first word is available the cycle after EF goes HIGH, always.
REN, WEN,
Q
D
0
0
Q
t
WCLK
CLK
RCLK
EF,PAE
FF,PAF,
WEN
–D
–Q
0
REN
–Q
OE
EF
+ t
17
17
RS
17
HF
LD
SKEW2
SKEW2
t
. The Latency Timing applies only at the Empty Boundary (EF = LOW).
ENS
> minimum specification, t
t
DS
Figure 6. First Data Word Latency after Reset with Simultaneous Read and Write
D
0
(FIRSTVALID WRITE)
(continued)
FRL
t
SKEW2
(maximum) = t
t
t
t
RSF
RSF
RSF
t
RS
t
OLZ
t
FRL
[19]
Figure 5. Reset Timing
CLK
+ t
SKEW2
t
REF
D
1
. When t
t
SKEW2
OE
< minimum specification, t
[17]
t
RSR
t
D
A
2
FRL
(maximum) = either 2*t
D
0
t
A
[20]
D
3
OE = 1
OE = 0
[18]
CLK
CY7C4265
+ t
D
SKEW2
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