CY8CTST200-24LQXIT Cypress Semiconductor Corp, CY8CTST200-24LQXIT Datasheet - Page 273
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CY8CTST200-24LQXIT
Manufacturer Part Number
CY8CTST200-24LQXIT
Description
CY8CTST200-24LQXIT
Manufacturer
Cypress Semiconductor Corp
Series
TrueTouch™r
Datasheet
1.CY8CTST200-16LGXI.pdf
(308 pages)
Specifications of CY8CTST200-24LQXIT
Applications
Touchscreen Controller
Core Processor
M8C
Program Memory Type
FLASH (32 kB)
Controller Series
CY8CT
Ram Size
2K x 8
Interface
I²C, SPI, UART/USART, USB
Number Of I /o
20
Voltage - Supply
1.8 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-WQFN Exposed Pad, 24-HWQFN
Processor Series
CY8CTxx2xx
Core
M8C
Data Bus Width
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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21.4.15 OUT_P1
This register enables specific internal signals to be output to Port 1 pins.
The GPIO drive modes must be specified to support the desired output mode (registers PRT1DM1 and PRT1DM0). If a pin is
enabled for output by a bit in this register, the corresponding signal has priority over any other internal function that may be
configured to output to that pin.
For additional information, refer to the
Bit
7
6
5
4
3
2
(continued on next page)
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
Individual Register Names and Addresses:
OUT_P1: 1,DDh
Access : POR
Bit Name
P16D
P16EN
P14D
P14EN
P12D
P12EN
Name
Output Override to Port 1 Register
RW : 0
P16D
7
RW : 0
P16EN
6
Description
Bit selects the data output to P1[6] when P16EN is high. Timer Output and CLK32 are available on
P0[4] as well, but outputs on P0[4] will not be passed through during sleep modes. Please refer to the
OUT_P0 register for more details.
0
1
Bit enables pin P1[6] for output of the signal selected by the P16D bit.
0
1
Bit selects the data output to P1[4] when P14EN is high.
0
1
Bit enables pin P1[4] for output of the signal selected by the P14D bit.
0
1
Bit selects the data output to P1[2] when P12EN is high.
0
1
Bit enables pin P1[2] for output of the signal selected by the P12D bit.
0
1
Register Definitions on page 112
Select Timer output (TIMEROUT)
Select CLK32
No internal signal output to P1[6]
Output the signal selected by P16D to P1[6]
Select Relaxation Oscillator (RO)
Select Comparator 1 Output (CMP1)
No internal signal output to P1[4]
Output the signal selected by P14D to P1[4]
Select Main System Clock (SYSCLK)
Select either TrueTouch Output signal (CS_OUT is selected by CS_OUT[1:0] bits in
CS_CR0 register) or TrueTouch clock depending upon bit 7 in PRS_CR register.
No internal signal output to P1[2]
Output the signal selected by P12D to P1[2]
RW : 0
P14D
5
RW : 0
P14EN
4
in the Digital Clocks chapter.
RW : 0
P12D
3
RW : 0
P12EN
2
1,DDh
RW : 0
P10D
1
RW : 0
P10EN
1,DDh
OUT_P1
0
273
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