DSPIC33EP256MU810-I/PT Microchip Technology, DSPIC33EP256MU810-I/PT Datasheet - Page 355

• Manufacturer Part Number: DSPIC33EP256MU810-I/PT
• Description: 100 PINS, 256KB Flash, 28KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 100 TQFP 12x12x1mm T
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33EPr

Specifications of DSPIC33EP256MU810-I/PT

• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 83
• Flash Memory Size: 280KB
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: TQFP
• No. Of Pins: 100
• Rohs Compliant: Yes
• Processor Series: DSPIC33E
• Core: dsPIC
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 60 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 83
• Program Memory Size: 256KB (85.5K x 24)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 12K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 32x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP
• Lead Free Status / Rohs Status: Details

22.0
22.1
The
PIC24EPXXXGU810/814 Universal Serial Bus (USB)
On-The-Go (OTG) module includes the following
features:
• USB full-speed support for host and device
• Low-speed host support
• USB On-The-Go support
• Integrated signaling resistors
• Integrated analog comparators for V
• Integrated USB transceiver
• Hardware performs transaction handshaking
• Endpoint buffering anywhere in system RAM
• Integrated DMA controller to access system RAM
• Support for all four transfer types:
• Queueing of up to four endpoint transfers without
• USB 5V charge pump controller
 2009-2011 Microchip Technology Inc.
monitoring
- Control
- Interrupt
- Bulk data
- Isochronous
servicing
Note 1: This data sheet summarizes the features
dsPIC33EPXXXMU806/810/814 and PIC24EPXXXGU810/814
2: Some registers and associated bits
USB ON-THE-GO (OTG)
MODULE
Overview
dsPIC33EPXXXMU806/810/814
of the dsPIC33EPXXXMU806/810/814
and PIC24EPXXXGU810/814 families of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 25. “USB On-
The-Go (OTG)” (DS70571) of the
“dsPIC33E/PIC24E Family Reference
Manual”, which is available from the
Microchip
(www.microchip.com).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
web
BUS
site
and
Preliminary
in
The USB module contains the analog and digital
components to provide a USB 2.0 full-speed and low-
speed embedded host, full-speed device, or OTG
implementation
components.
The USB module consists of the clock generator, the
USB voltage comparators, the transceiver, the Serial
Interface Engine (SIE), pull-up and pull-down resistors,
and the register interface.
block diagram of the dsPIC33EPXXXMU806/810/814
and
module.
The device auxiliary clock generator provides the 48
MHz clock required for USB communication. The
voltage comparators monitor the voltage on the V
pin to determine the state of the bus. The transceiver
provides the analog translation between the USB bus
and the digital logic. The SIE is a state machine that
transfers data to and from the endpoint buffers and
generates the protocol for data transfers. The
integrated pull-up and pull-down resistors eliminate the
need for external signaling components. The register
interface
communicate with the module.
22.1.1 Clearing USB OTG Interrupts
Unlike device level interrupts, the USB OTG interrupt
status flags are not freely writable in software. All USB
OTG flag bits are implemented as hardware set-only
bits. Additionally, these bits can only be cleared in
software by writing a ‘1’ to their locations (i.e.,
performing a BSET instruction). Writing a ‘0’ to a flag bit
(i.e., a BCLR instruction) has no effect.
Note:
Note:
PIC24EPXXXGU810/814
allows
The implementation and use of the USB
specifications
specifications or technology may require a
license from various entities, including,
but not limited to USB Implementers
Forum, Inc. (also referred to as USB-IF). It
is your responsibility to obtain more
information regarding any applicable
licensing obligations.
Throughout this section, a bit that can only
be cleared by writing a ‘1’ to its location is
referred to as “Write ‘1’ to clear bit”. In reg-
ister descriptions, this function is indicated
by the descriptor, “K”.
with
the
a
CPU
and
Figure 22-1
minimum
to
other
Output
DS70616E-page 355
configure
illustrates the
of
third
Compare
external
party
and
BUS