DSPIC33EP256MU810-I/PT Microchip Technology, DSPIC33EP256MU810-I/PT Datasheet - Page 88

• Manufacturer Part Number: DSPIC33EP256MU810-I/PT
• Description: 100 PINS, 256KB Flash, 28KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 100 TQFP 12x12x1mm T
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33EPr

Specifications of DSPIC33EP256MU810-I/PT

• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 83
• Flash Memory Size: 280KB
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: TQFP
• No. Of Pins: 100
• Rohs Compliant: Yes
• Processor Series: DSPIC33E
• Core: dsPIC
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 60 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 83
• Program Memory Size: 256KB (85.5K x 24)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 12K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 32x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP
• Lead Free Status / Rohs Status: Details

TABLE 4-32:
TABLE 4-33:
PMCON
PMMODE
PMADDR
PMDOUT1
PMDOUT2
PMDIN1
PMDIN2
PMAEN
PMSTAT
Legend:
Note
CRCCON1
CRCCON2
CRCXORL
CRCXORH
CRCDATL
CRCDATH
CRCWDATL 064C
CRCW-
DATH
Legend:
File Name
Name
1:
(1)
(1)
— = unimplemented, read as ‘0’. Shaded bits are not used in the operation of the PMP module.
PMADDR and PMDOUT1 are the same physical register, but are defined differently depending on the module’s operating mode.
Addr.
— = unimplemented, read as ‘0’. Shaded bits are not used in the operation of the programmable CRC module.
060A
060C
060E
0600
0602
0604
0604
0606
0608
Addr
0640
0642
0644
0646
0648
064A
064E
.
PTEN15 PTEN14 PTEN13 PTEN12 PTEN11
PARALLEL MASTER/SLAVE PORT REGISTER MAP
PMPEN
CRC REGISTER MAP
CRCEN
Bit 15
BUSY
Bit 15
CS2
IBF
—
Bit 14
Bit 14
IBOV
CS1
—
—
—
IRQM<1:0>
PSIDL
CSIDL
Bit 13
Bit 13
—
—
Bit 12
Bit 12
ADRMUX<1:0>
—
INCM<1:0>
Bit 11
IB3F
Bit 11
DWIDTH<4:0>
VWORD<4:0>
MODE16
PTBEEN
PTEN10
Bit 10
IB2F
Bit 10
Parallel Port Data Out Register 1 (Buffers Level 0 and 1)
Parallel Port Data Out Register 2 (Buffers Level 2 and 3)
Parallel Port Data In Register 1 (Buffers Level 0 and 1)
Parallel Port Data In Register 2 (Buffers Level 2 and 3)
PTWREN PTRDEN
PTEN9
Bit 9
Bit 9
IB1F
MODE<1:0>
CRC Data Input High Word
CRC Data Input Low Word
CRC Result High Word
PTEN8
CRC Result Low Word
Bit 8
(1)
Bit 8
IB0F
X<15:1>
Parallel Port Address (ADDR<13:0>)
X<23:16>
CRCFUL
PTEN7
Bit 7
Bit 7
OBE
—
WAITB<1:0>
CSF<1:0>
CRCMPT
PTEN6
OBUF
Bit 6
Bit 6
—
CRCISEL
PTEN5
Bit 5
ALP
Bit 5
—
—
PTEN4
CRCGO
CS2P
Bit 4
Bit 4
—
WAITM<3:0>
LENDIAN
PTEN3
OB3E
CS1P
Bit 3
Bit 3
PLEN<4:0>
PTEN2
OB2E
Bit 2
Bit 2
BEP
—
PTEN1
WRSP
OB1E
Bit 1
Bit 1
—
WAITE<1:0>
Bit 0
PTEN0
RDSP
OB0E
—
—
Bit 0
Resets
0000
0000
0000
0000
0000
0000
0000
0000
All
Resets
0000
0000
0000
0000
0000
0000
0000
0000
008F
All