DSPIC33FJ16GS504-I/TL Microchip Technology, DSPIC33FJ16GS504-I/TL Datasheet - Page 216
![16 Bit MCU/DSP 40MIPS 16 KB FLASH 2KB RAM SMPS 44 TLA 6x6x0.9 Mm TUBE](/photos/15/63/156380/40-pdip-angled-300dpi-lyrd_sml.jpg)
DSPIC33FJ16GS504-I/TL
Manufacturer Part Number
DSPIC33FJ16GS504-I/TL
Description
16 Bit MCU/DSP 40MIPS 16 KB FLASH 2KB RAM SMPS 44 TLA 6x6x0.9 Mm TUBE
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet
1.DSPIC33FJ06GS101-ISO.pdf
(346 pages)
Specifications of DSPIC33FJ16GS504-I/TL
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
dsPIC33FJ
Core
dsPIC
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
35
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
DM240001, DM240002
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
- Current page: 216 of 346
- Download datasheet (6Mb)
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
REGISTER 15-16: TRIGx: PWMx PRIMARY TRIGGER COMPARE VALUE REGISTER
REGISTER 15-17: STRIGx: PWMx SECONDARY TRIGGER COMPARE VALUE REGISTER
DS70318D-page 214
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-3
bit 2-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-3
bit 2-0
R/W-0
R/W-0
R/W-0
R/W-0
TRGCMP<15:3>: Trigger Control Value bits
When primary PWM functions in local time base, this register contains the compare values that can
trigger the ADC module.
Unimplemented: Read as ‘0’
STRGCMP<15:3>: Secondary Trigger Control Value bits
When secondary PWM functions in local time base, this register contains the compare values that can
trigger the ADC module.
Unimplemented: Read as ‘0’
R/W-0
R/W-0
R/W-0
R/W-0
STRGCMP<7:3>
TRGCMP<7:3>
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
STRGCMP<15:8>
TRGCMP<15:8>
Preliminary
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
‘0’ = Bit is cleared
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
U-0
U-0
—
—
© 2009 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
R/W-0
R/W-0
U-0
U-0
—
—
R/W-0
R/W-0
U-0
U-0
—
—
bit 8
bit 0
bit 8
bit 0
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