DSPIC33FJ16GS504-I/TL Microchip Technology, DSPIC33FJ16GS504-I/TL Datasheet - Page 275

• Manufacturer Part Number: DSPIC33FJ16GS504-I/TL
• Description: 16 Bit MCU/DSP 40MIPS 16 KB FLASH 2KB RAM SMPS 44 TLA 6x6x0.9 Mm TUBE
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ16GS504-I/TL

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x10b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Processor Series: dsPIC33FJ
• Core: dsPIC
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 35
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: DM240001, DM240002
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

TABLE 22-1:
© 2009 Microchip Technology Inc.
Wm*Wm
Wm*Wn
Wn
Wnd
Wns
WREG
Ws
Wso
Wx
Wxd
Wy
Wyd
Field
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
SYMBOLS USED IN OPCODE DESCRIPTIONS (CONTINUED)
Multiplicand and Multiplier Working register pair for Square instructions ∈
{W4 * W4,W5 * W5,W6 * W6,W7 * W7}
Multiplicand and Multiplier Working register pair for DSP instructions ∈
{W4 * W5,W4 * W6,W4 * W7,W5 * W6,W5 * W7,W6 * W7}
One of 16 Working registers ∈ {W0..W15}
One of 16 Destination Working registers ∈ {W0...W15}
One of 16 Source Working registers ∈ {W0...W15}
W0 (Working register used in file register instructions)
Source W register ∈ { Ws, [Ws], [Ws++], [Ws--], [++Ws], [--Ws] }
Source W register ∈
{ Wns, [Wns], [Wns++], [Wns--], [++Wns], [--Wns], [Wns+Wb] }
X Data Space Prefetch Address register for DSP instructions
∈ {[W8] + = 6, [W8] + = 4, [W8] + = 2, [W8], [W8] - = 6, [W8] - = 4, [W8] - = 2,
X Data Space Prefetch Destination register for DSP instructions ∈ {W4...W7}
Y Data Space Prefetch Address register for DSP instructions
∈ {[W10] + = 6, [W10] + = 4, [W10] + = 2, [W10], [W10] - = 6, [W10] - = 4, [W10] - = 2,
Y Data Space Prefetch Destination register for DSP instructions ∈ {W4...W7}
[W9] + = 6, [W9] + = 4, [W9] + = 2, [W9], [W9] - = 6, [W9] - = 4, [W9] - = 2,
[W9 + W12], none}
[W11] + = 6, [W11] + = 4, [W11] + = 2, [W11], [W11] - = 6, [W11] - = 4, [W11] - = 2,
[W11 + W12], none}
Preliminary
Description
DS70318D-page 273