DSPIC33FJ32GP202T-I/SO Microchip Technology, DSPIC33FJ32GP202T-I/SO Datasheet - Page 273

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DSPIC33FJ32GP202T-I/SO

Manufacturer Part Number
DSPIC33FJ32GP202T-I/SO
Description
16-bit DSC, 32KB Flash,40 MIPS,nanoWatt 28 SOIC .300in T/R
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ32GP202T-I/SO

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DSPIC33FJ32GP202T-I/SOTR
Revision D (October 2009)
This revision includes minor typographical and
formatting changes throughout the data sheet text.
Global changes include:
• Changed all instances of OSCI to OSC1 and
• Changed all instances of PGCx/EMUCx and
Changed all instances of V
to V
All other major changes are referenced by their
respective section in the following table.
TABLE A-3:
© 2011 Microchip Technology Inc.
“High-Performance, 16-bit Digital Signal
Controllers”
Section 8.0 “Oscillator Configuration”
Section 10.0 “I/O Ports”
Section 15.0 “Serial Peripheral Interface
(SPI)”
Section 17.0 “Universal Asynchronous
Receiver Transmitter (UART)”
Section 22.0 “Electrical Characteristics” Updated the Min value for parameter DC12 (RAM Retention Voltage)
dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
OSCO to OSC2.
PGDx/EMUDx (where x = 1, 2 or 3) to PGECx
and PGEDx.
CAP
/V
DDCORE
Section Name
MAJOR SECTION UPDATES
DDCORE
and V
DDCORE
Added Note 2 to the 28-Pin QFN-S and 44-Pin QFN pin diagrams,
which references pin connections to V
Updated the Oscillator System Diagram (see Figure 8-1).
Added Note 1 to the Oscillator Tuning (OSCTUN) register (see
Register 8-4).
Removed Table 10-1 and added reference to pin diagrams for I/O pin
availability and functionality.
Added Note 2 to the SPIx Control Register 1 (see Register 15-2).
Updated the UTXINV bit settings in the UxSTA register and added Note
1 (see Register 17-2).
and added Note 4 to the DC Temperature and Voltage Specifications
(see Table 22-4).
Updated the Min value for parameter DI35 (see Table 22-20).
Updated AD08 and added reference to Note 2 for parameters AD05a,
AD06a and AD08a (see Table 22-34).
/V
CAP
Update Description
SS
.
DS70290G-page 273

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