EP2SGX90EF1152I4 Altera, EP2SGX90EF1152I4 Datasheet - Page 210

Stratix II GX

EP2SGX90EF1152I4

Manufacturer Part Number
EP2SGX90EF1152I4
Description
Stratix II GX
Manufacturer
Altera
Datasheet

Specifications of EP2SGX90EF1152I4

Family Name
Stratix II GX
Number Of Logic Blocks/elements
90960
# I/os (max)
558
Frequency (max)
732.1MHz
Process Technology
SRAM
Operating Supply Voltage (typ)
1.2V
Logic Cells
90960
Ram Bits
4520448
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
1152
Package Type
FC-FBGA
Lead Free Status / Rohs Status
Not Compliant

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Operating Conditions
4–40
Stratix II GX Device Handbook, Volume 1
Functional
BASIC
Single
Width
Table 4–22. PCS Latency (Part 2 of 3)
Mode
Configuration
with Rate
with Rate
16/20-bit
16/20-bit
Matcher
Matcher
Matcher
Matcher
channel
channel
channel
channel
8/10-bit
8/10-bit
without
without
width;
width;
width;
width;
Rate
Rate
Aligner
2-2.5
2-2.5
Word
4-5
4-5
Deskew
FIFO
-
-
-
-
Note (1)
5.5-6.5
Matcher
11-13
Rate
(3)
-
-
Decoder
8B/10B
0.5
0.5
1
1
Receiver PCS Latency
Receiver
Machine
State
-
-
-
-
serializer
Byte
De-
1
1
1
1
Order
Byte
1
1
1
1
Altera Corporation
Receiver
Phase
Comp
FIFO
1-2
1-2
1-2
1-2
June 2009
Receiver
PIPE
1
-
-
-
19-23
11-14
8-10
Sum
6-7
(2)

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