EVAL-AD7291SDZ Analog Devices Inc, EVAL-AD7291SDZ Datasheet - Page 22

• Manufacturer Part Number: EVAL-AD7291SDZ
• Description: Evaluation Control Board
• Manufacturer: Analog Devices Inc
• Series: -r

Specifications of EVAL-AD7291SDZ

• Rohs Compliant: YES
• Silicon Manufacturer: Analog Devices
• Kit Application Type: Interface
• Application Sub Type: ADC
• Features: Channel Sequencer Operation, Alert Function, Autocycle Mode
• Number Of Adc's: 8
• Number Of Bits: 12
• Sampling Rate (per Second): 22.22k
• Data Interface: I²C
• Input Range: -
• Power (typ) @ Conditions: -
• Operating Temperature: -
• Utilized Ic / Part: AD7291
• Silicon Core Number: AD7291
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

AD7291
WRITING TO THE AD7291
WRITING TWO BYTES OF DATA TO A 16-BIT
REGISTER
All registers on the AD7921 are 16-bit registers; therefore, two
bytes of data are required to write a value to any one of these
registers. Writing two bytes of data to a register consists of the
following sequence (see Figure 25):
1.
2.
3.
4.
5.
6.
7.
8.
9.
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address followed by the
write bit (low).
The addressed slave device asserts an acknowledge on SDA.
The master sends a register address. The slave asserts an
acknowledge on SDA.
The master sends the first data byte (most significant).
The slave asserts an acknowledge on SDA.
The master sends the second data byte (least significant).
The slave asserts an acknowledge on SDA.
The master asserts a stop condition on SDA to end the
transaction.
...
S
FROM MASTER TO SLAVE
FROM SLAVE TO MASTER
S
SLAVE ADDRESS
POINT TO COMMAND REG (0x00)
FROM MASTER TO SLAVE
FROM SLAVE TO MASTER
SLAVE ADDRESS
S = START CONDITION
SR = REPEATED START
P = STOP CONDITION
SA = SLAVE ACKNOWLEDGE
A = NOT ACKNOWLEDGE
0
SA
S = START CONDITION
SR = REPEATED START
P = STOP CONDITION
SA = SLAVE ACKNOWLEDGE
A = NOT ACKNOWLEDGE
0
Figure 25. Writing Two Bytes of Data to a 16-Bit Register
POINT TO CH1 DATA
SA
SA
Figure 26. Writing to Multiple Registers
REG POINTER
DATA[15:8]
Rev. 0 | Page 22 of 28
HIGH
REG (0x04)
SA
SA
WRITING TO MULTIPLE REGISTERS
Writing to multiple address registers consists of the following
steps (see Figure 26):
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. The master sends a second register address, for example,
11. The slave (AD7291) asserts an acknowledge on SDA.
12. The master sends the first data byte.
13. The slave (AD7291) asserts an acknowledge on SDA.
14. The master sends the second data byte.
15. The slave (AD7291) asserts an acknowledge on SDA.
16. The master asserts a stop condition on SDA to end the
The previous example details writing to two registers only (the
CH1 DATA
However, the AD7291 can read from multiple registers in one
write operation as shown in Figure 26.
DATA[15:8]
SA
DATA[7:0]
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address followed by
the write bit (low).
The addressed slave device (AD7291) asserts an
acknowledge on SDA.
The master sends a register address, for example, the CH1
DATA
The slave (AD7291) asserts an acknowledge on SDA.
The master sends the first data byte.
The slave (AD7291) asserts an acknowledge on SDA.
The master sends the second data byte.
The slave (AD7291) asserts an acknowledge on SDA.
the command register.
transaction.
DATA[15:8]
HIGH
HIGH
register address.
SA
register address and the command register).
SA
P
DATA[7:0]
SA
DATA[7:0]
SA
P
SA
...