KSZ8841-16MBL Micrel Inc, KSZ8841-16MBL Datasheet - Page 61

• Manufacturer Part Number: KSZ8841-16MBL
• Description: Single Ethernet Port + Generic (16-bit) Bus Interface( )
• Manufacturer: Micrel Inc

Specifications of KSZ8841-16MBL

• Controller Type: Ethernet Controller, MAC
• Interface: Bus
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LFBGA
• Operating Supply Voltage (typ): 3.3V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 576-3075

Bank 6 Wakeup Frame 2 Byte Mask 1 Register (0x06): WF2BM1
This register contains the next 16 bytes mask values of the Wake up frame 2 pattern. Setting bit 0 selects the 17th byte
of the Wake up frame 2. Setting bit 15 selects the 32nd byte of the Wake up frame 2.
Bank 6 Wakeup Frame 2 Byte Mask 2 Register (0x08): WF2BM2
This register contains the next 16 bytes mask values of the Wake up frame 2 pattern. Setting bit 0 selects the 33rd byte
of the Wake up frame 2. Setting bit 15 selects the 48th byte of the Wake up frame 2.
Bank 6 Wakeup Frame 2 Byte Mask 3 Register (0x0A): WF2BM3
This register contains the last 16 bytes mask values of the Wake up frame 2 pattern. Setting bit 0 selects the 49th byte
of the Wake up frame 2. Setting bit 15 selects the 64th byte of the Wake up frame 2.
Bank 7 Wakeup Frame 3 CRC0 Register (0x00): WF3CRC0
This register contains the expected CRC values of the Wake up frame 3 pattern.
The value of the CRC calculated is based on the IEEE 802.3 Ethernet standard, it is taken over the bytes specified in
the wake-up byte mask registers.
Bank 7 Wakeup Frame 3 CRC1 Register (0x02): WF3CRC1
This register contains the expected CRC values of the Wake up frame 3 pattern.
The value of the CRC calculated is based on the IEEE 802.3 Ethernet standard, it is taken over the bytes specified in
the wake up byte mask registers.
October 2007
Micrel, Inc.
Bit
15-0
Bit
15-0
Bit
15-0
Bit
15-0
Bit
15-0
Default Value
0
Default Value
0
Default Value
0
Default Value
0
Default Value
0
R/W
RW
R/W
RW
R/W
RW
R/W
RW
R/W
RW
Description
WF2BM1
Wake-up frame 2 Byte Mask 1.
The next 16 bytes mask covering bytes 17 to 32 of a Wake-up frame 2 pattern.
Description
WF2BM2
Wake-up frame 2 Byte Mask 2.
The next 16 bytes mask covering bytes 33 to 48 of a Wake-up frame 2 pattern.
Description
WF2BM3
Wake-up frame 2 Byte Mask 3.
The last 16 bytes mask covering bytes 49 to 64 of a Wake-up frame 2 pattern.
Description
WF3CRC0
Wake-up frame 3 CRC (lower 16 bits).
The expected CRC value of a Wake up frame 3pattern.
Description
WF3CRC1
Wake-up frame 3 CRC (upper 16 bits).
The expected CRC value of a Wake up frame 3 pattern.
61
KSZ8841-16/32 MQL/MVL/MBL
M9999-102207-1.6