KSZ8842-PMBL Micrel Inc, KSZ8842-PMBL Datasheet - Page 53

• Manufacturer Part Number: KSZ8842-PMBL
• Description: 2-Port Ethernet Switch/Repeater + 32-bit/33MHz PCI Bus Interface ( )
• Manufacturer: Micrel Inc

Specifications of KSZ8842-PMBL

• Controller Type: Ethernet Switch Controller
• Interface: PCI
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LFBGA
• Number Of Primary Switch Ports: 2
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII
• Power Supply Type: Analog/Digital
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 3.5V
• Operating Supply Voltage (min): 3.1V
• Operating Temperature Classification: Commercial
• Data Rate: 100Mbps
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1636 - BOARD EVALUATION KSZ8842-PMQL
• Current - Supply: -
• Lead Free Status / RoHS Status: Supplier Unconfirmed, Lead free / RoHS Compliant
• Other names: 576-3089

Micrel, Inc.
Switch Global Control Register 1 (Offset 0x0402): SGCR1
This register contains the global control for the switch function.
October 2007
6 – 4
Bit
15
14
13
12
11
10
9
8
3
3
2
1
0
Default
0x4
0x0
0
0
1
1
1
1
0
0
1
1
0
0
R/Write
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Description
Pass all frames
1 = switch all packets including bad ones. Used solely for debugging
purposes. Works in conjunction with Sniffer mode only.
Reserved.
For factory test purposes only. Always write 0.
IEEE 802.3x Transmit direction flow control enable
1 = will enable transmit direction flow control feature.
0 = will not enable transmit direction flow control feature. Switch will not
generate any flow control packets.
IEEE 802.3x Receive direction flow control enable
1 = will enable receive direction flow control feature.
0 = will not enable receive direction flow control feature. Switch will not
react to any received flow control packets.
Frame Length field check
1 = will check frame length field in the IEEE packets. If the actual length
does not match, the packet will be dropped (for Length/Type field < 1500).
Aging enable
1 = enable age function in the chip
0 = disable age function in the chip
Fast age enable
1 = turn on fast age (800µs)
Aggressive back off enable
1 = enable more aggressive back off algorithm in half duplex mode to
enhance performance. This is not an IEEE standard.
Reserved
Reserved
Pass flow control packet
1 = switch will not filter 802.1x “flow control” packets.
Reserved
Reserved
Link change age
1 = link change from “link” to “no link” will cause fast aging (<800µs) to
age address table faster. After an age cycle is complete, the age logic will
return to normal (300 + 75 seconds).
Note: If any port is unplugged, all addresses will be automatically aged
out.
53
KSZ8842-PMQL/PMBL
M9999-100207-1.5