CYIL1SC4000AA-GDC Cypress Semiconductor Corp, CYIL1SC4000AA-GDC Datasheet

no-image

CYIL1SC4000AA-GDC

Manufacturer Part Number
CYIL1SC4000AA-GDC
Description
IC IMAGE SENSOR 4MP 127-PGA
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CYIL1SC4000AA-GDC

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Features
Applications
Ordering Information
Note Refer to
Cypress Semiconductor Corporation
Document Number: 38-05712 Rev. *F
CYIL1SM4000AA-GDC
CYIL1SC4000AA-GDC
CYIL1SM4000-EVAL
2048 × 2048 active pixels
12-µm × 12-µm square pixels
24.6-mm × 24.6-mm optical format
Monochrome or color digital output
15 frames per second (fps) at full resolution
Pipelined global shutter
Random programmable region of interest (ROI) readout and
subsampling modes
Serial peripheral interface (SPI)
Operational range: 0 °C to 60 °C
127-pin PGA package
220-mW power dissipation
Intelligent traffic system
High speed machine vision
Marketing Part Number
Ordering Code Definition
on page 26 for more information.
Mono with Glass
Color with Glass
Mono demo kit
198 Champion Court
Description
Overview
The LUPA 4000 is a CMOS image sensor (CIS) with a 4.0
megapixel resolution 2048 × 2048 pixel format.
This document describes the interfacing and driving of the LUPA
4000 image sensor. This 4 megapixel CMOS active pixel sensor
features synchronous shutter and a maximal frame rate of 15 fps
in full resolution. The readout speed can be boosted by
sub-sampling and windowed ROI readout. High dynamic range
scenes can be captured using the double and multiple slope
functionality.
The sensor uses a 3-wire SPI and is housed in a 127-pin ceramic
PGA package. The LUPA 4000 is available in mono and color
option.
Figure 1. LUPA 4000 Photo
San Jose
LUPA 4000: 4 Megapixel
CMOS Image Sensor
,
CA 95134-1709
CYIL1SM4000AA
127-pin PGA
Revised October 8, 2010
Demo Kit
Package
408-943-2600

Related parts for CYIL1SC4000AA-GDC

CYIL1SC4000AA-GDC Summary of contents

Page 1

... Applications Intelligent traffic system ■ High speed machine vision ■ Ordering Information Marketing Part Number CYIL1SM4000AA-GDC CYIL1SC4000AA-GDC CYIL1SM4000-EVAL Note Refer to Ordering Code Definition Cypress Semiconductor Corporation Document Number: 38-05712 Rev. *F Overview The LUPA 4000 is a CMOS image sensor (CIS) with a 4.0 megapixel resolution 2048 × ...

Page 2

Contents Features ................................................................................1 Applications .........................................................................1 Overview ...............................................................................1 Ordering Information ...........................................................1 Specifications ......................................................................3 Key Specifications ...........................................................3 Absolute Maximum Ratings ............................................3 Absolute Maximum Ratings ............................................3 Electrical Specifications ..................................................4 Overview ...............................................................................5 Color Filter Array ............................................................5 Sensor Architecture ............................................................6 Image Core .....................................................................6 Output Amplifier ...

Page 3

Specifications Key Specifications General Specifications Parameter Active pixels 2048 × 2048 Pixel size 12 µm × 12 µm Optical format 24.6 mm × 24.6 mm Pixel type Global shutter pixel architecture Shutter type Pipelined global shutter Master clock 33 MHz ...

Page 4

Electrical Specifications Power Supply Ratings Limits in bold apply for MIN Parameter Power Supply Parameters Vdd Core digital supply Idd Core digital current Vaa Analog supply voltage Iaa Analog supply current Vpix Pixel supply ...

Page 5

Overview The LUPA 4000 CMOS active pixel sensor features a global shutter with a maximum frame rate of 15 fps in full resolution. The readout speed is boosted by sub sampling and the windowed ROI readout. High dynamic range scenes ...

Page 6

Sensor Architecture The LUPA 4000 architecture is shown in Image Core The image core consists of a pixel array, one X-addressing and two Y-addressing registers (only one drawn), pixel array drivers, and column amplifiers. The active pixel area is read ...

Page 7

Pixel Array Drivers The image sensor has on-chip drivers for the pixel array signals The driving on system level is easy and flexible; the maximum currents applied to the sensor are also controlled on-chip. This means that the charging on ...

Page 8

Setting ADC Reference Voltages Figure 7. Internal and External ADC Connections 2.5 V RHIGH_adc Vref_HIGH ~2 V RADC Vref_LOW ~1 V RLOW_adc gnd_33 has a value of approximately 300 Ω. The internal resistor R ADC The value of this resistor ...

Page 9

Non Destructive Readout (NDR) The sensor can also be read out in a non destructive way. After a pixel is initially reset, it can be read multiple times without resetting. The initial reset level and all intermediate signals can be ...

Page 10

Biasing and Analog Signals The expected analog output levels are between 0.3 V for a white, saturated, pixel and 1.3 V for a black pixel. There are two output stages, each consisting of two output amplifiers, resulting in four outputs. ...

Page 11

In Figure 11, levels are defined by the pixel array voltage supplies; for correct polarities of the signals see signals in Figure 11 are generated from the on-chip drivers. These on-chip drivers need two types of signals to generate the ...

Page 12

Sh_kol (AL ): Control signal of the column readout used ■ in sample and hold mode and binning mode. [10] Norowsel (AH ): Control signal of the column readout (see ■ Timing and Readout of Image Sensor). ...

Page 13

Timing and Readout of Image Sensor The timing of the LUPA 4000 sensor consists of two parts. The first part is related to the control of the pixels, the integration time, and the signal level. The second part is related ...

Page 14

Timing specifications for each signal are shown in Falling edge of precharge is equal or later than falling edge of ■ Vmem. Sample is overlapping with precharge. ■ Rising edge of Vmem is more than 200 ns after rising edge ...

Page 15

X and Y Addressing To read out a frame, the lines are selected sequentially. Clock_y and Sync_y signal. The Sync_y signals synchronises the y-addressing and initialises the y-address selection registers. The start address is the address downloaded in the SPI ...

Page 16

The figure shows Clock_x, Sync_x, internal selection pixel 1 and 2, internal selection pixel 3 and 4, internal selection pixel 5 and 6. The first pixel selected is the x-address downloaded in the SPI. The starting address is the number ...

Page 17

In the figure, shown from bottom to top: Clock_x, Sync_x and output. Output level before the first pixel is the level of the last pixel on previous line. As soon as Sync_x is high and one rising edge of Clock_x ...

Page 18

Figure 20 shows this principle. Sh_col is now a pulse of 100 ns to 200 ns starting at the same time as pre_col and Norowsel. The duration of Sh_col is equal to the ROT. The shorter this time the shorter ...

Page 19

Table 8. Readout Timing Specifications with Precharching of Buses Symbol Serial Peripheral Interface The SPI is required to upload different modes. Table 9. SPI Parameters Parameter Y-direction Y-address X-voltage averaging enable ...

Page 20

Pin List Table 10 lists the pins and their functionalities. [12, 13, 14] Table 10. Pin List Pad Pin Pin Name 1 E1 sync_x 2 F1 eos_x 3 D2 vdd 4 G2 clock_x 5 G1 eos_spi 6 F2 spi_data 7 ...

Page 21

Table 10. Pin List (continued) Pad Pin Pin Name 33 L3 prebus2 34 Q8 sh_col 35 R4 pre_col 36 R5 norowsel 37 R6 clock_y 38 R7 sync_y 39 K2 eos_y_r 40 Q9 temp_diode_p 41 Q10 temp_diode_n 42 ...

Page 22

Table 10. Pin List (continued) Pad Pin Pin Name 71 J15 vpre_l 72 J16 vdd 73 K15 vmem_h 74 K16 vmem_l 75 H15 adc2_ref_low 76 H16 adc2_linear_conv 77 G16 adc2_bit_9 78 F16 adc2_bit_8 79 E16 adc2_bit_7 80 ...

Page 23

Table 10. Pin List (continued) Pad Pin Pin Name 109 B6 precharge_bias 110 A8 photodiode 111 A7 gndd 112 B12 vdd 113 A6 eos_y_l 114 A1 sync_y 115 A5 clock_y 116 A2 norowsel 117 A3 volt. averaging ...

Page 24

Package Drawing Figure 23. LUPA 4000: 127 Pin PGA Package Drawing Document Number: 38-05712 Rev. *F CYIL1SM4000AA 001-07580 *C Page ...

Page 25

Bonding Diagram The die is bonded to the bonding pads of the package as shown in Additional Package Information Die size: 25610 µm X 27200 µm ■ Cavity pad: 27000 µm X 29007 µm ■ Pixel 0,0 is located at ...

Page 26

Glass Lid The LUPA 4000 image sensor uses a glass lid without any coatings. As seen in Figure 25, the sensor does not use infrared attenuating color filter glass. You must provide a filter in the optical path when using ...

Page 27

Acronyms Acronym Description ADC analog-to-digital converter AFE analog front end ANSI American National Standards Institute BGA ball grid array BL black pixel data CDM Charged Device Model CDS correlated double sampling CIS CMOS image sensor CMOS complementary metal oxide semiconductor ...

Page 28

Glossary blooming The leakage of charge from a saturated pixel into neighboring pixels. camera gain constant A constant that converts the number of electrons collected by a pixel into digital output (in DN). It can be extracted from photon transfer ...

Page 29

Noise associated with all circuitry that measures and converts the voltage on a sense node or photodiode into an output signal. reset The process by which a pixel photodiode or sense node is cleared of electrons. Soft reset ...

Page 30

Appendix A: LUPA 4000 Evaluation System An LUPA 4000 evaluation kit is available. This kit consists of a multifunctional digital board (memory, sequencer, and Ethernet) and an analog image sensor board. Bench Tools software (under Win 2000 or XP) allows ...

Page 31

Appendix B: Frequently Asked Questions Q: How does the dual (multiple) slope extended dynamic range mode work? A: The green lines in Figure 27 are the analog signal on the photodiode, which decrease as a result of exposure. The slope ...

Page 32

... Cypress against all charges. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement ...

Related keywords