CYII5SC1300AA-QDC Cypress Semiconductor Corp, CYII5SC1300AA-QDC Datasheet - Page 47

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CYII5SC1300AA-QDC

Manufacturer Part Number
CYII5SC1300AA-QDC
Description
IC SENSOR IMMAGE COLOR 84-LCC
Manufacturer
Cypress Semiconductor Corp
Type
CMOS Imagingr

Specifications of CYII5SC1300AA-QDC

Pixel Size
6.7µm x 6.7µm
Active Pixel Array
1280H x 1024V
Frames Per Second
27
Voltage - Supply
3 V ~ 4.5 V
Package / Case
84-LCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
4.4 Synchronous shutter: multiple slope integration
Up to 4 different pixel reset voltages can be used during multiple slope operation in
synchronous shutter mode.
K
Bit K
Bits K
is applied. Every time an S
The register upload should be uploaded after time T
the SS-sequencer resulting in a bad pixel reset. T
SS-sequencer clock (see Table 26).
NEEPOINT_MSB/LSB/ENABLE
Contact
Cypress Semiconductor Corporation
IBIS5-A-1300
NEEPOINT_ENABLE
NEEPOINT_MSB/LSB/ENABLE
Datasheet
Granularity
info@Fillfactory.com
N
x 128
x 32
x 64
GRAN
Initial setup
1
2
3
4
st
nd
th
th
register upload
register upload
register upload
register upload
Table 26: T
should be set high to do a pixel reset with a lower voltage.
S_START
Table 25: Multiple slope register settings
= 5 x N
Figure 25: Multiple slope integration
Document #: 38-05710 Rev.**(Revision 1.3)
This is done by uploading new values to register bits
before a new S
640 x T
3901 North First Street
stable
GRAN
T
160 x T
320 x T
should be set back to “0” before the SS_STOP pulse
pulse is applied, the integration time counter is reset.
stable
for different granularity settings
x T
(µs)
SYS_CLOCK
SYS_CLOCK
SYS_CLOCK
SYS_CLOCK
MSB/LSB
S_START
00
01
10
11
00
= 16
KNEEPOINT
= 4
= 8
stable
stable
pulse is applied.
depends on the granularity of the
, otherwise the change will affect
GRAN_SS_SEQ
San Jose, CA 95134
ENABLE
MSB/LSB
00
01
10
0
1
1
1
0
Page 47 of 67
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