LTC4253AIGN#TR Linear Technology, LTC4253AIGN#TR Datasheet - Page 20

• Manufacturer Part Number: LTC4253AIGN#TR
• Description: MS-Hot Swap/High Voltage, Neg. 48V Hot Swap With 1% UV, Sequencer
• Manufacturer: Linear Technology

Specifications of LTC4253AIGN#TR

• Family Name: LTC4253A
• Package Type: SSOP N
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Product Depth (mm): 3.99mm
• Product Height (mm): 1.5mm
• Mounting: Surface Mount
• Pin Count: 16
• Lead Free Status / Rohs Status: Not Compliant

APPLICATIO S I FOR ATIO
LTC4253/LTC4253A
Computing the maximum soft-start capacitor value during
soft-start to a load short is complicated by the nonlinear
MOSFET’s SOA characteristics and the R
An overconservative but simple approach begins with the
maximum circuit breaker current, given by:
where V
From the SOA curves of a prospective MOSFET, determine
the time allowed, t
In the above example, 60mV/40mΩ gives 1.5A. t
the IRF530S is 40ms. From Equation (15), C
Actual board evaluation showed that C
appropriate. The ratio ( R
gauge as large ratios may result in the time-out period
expiring prematurely. This gauge is determined empiri-
cally with board level evaluation.
SUMMARY OF DESIGN FLOW
To summarize the design flow, consider the application
shown in Figure 3 for the LTC4253A. It was designed for
80W and C
Calculate maximum load current: 80W/43V = 1.86A;
allowing for 83% converter efficiency, I
Calculate R
Calculate I
I
Select a MOSFET that can handle 3.3A at 71V: IRF530S.
Calculate C
C
period t
20
SHORTCIRCUIT(MAX)
T
I
C
C
= 680nF, which gives the circuit breaker time-out
CB MAX
SS
SS
(
=
=
MAX
CB(MAX)
0 916
2 48
t
)
t
SOA MAX
L
.
.
S
SOA MAX
T
=
SHORT-CIRCUIT(MAX)
= 5.9ms.
: from Equation (8) R
= 100µF.
: from Equation (13) C
V
(
•
(
CB MAX
is 60mV (55mV for the LTC4253A).
R
•
R
R
(
SS
SOA(MAX)
S
SS
U
)
= 3.3A.
)
for the LTC4253A
)
for the LTC4253
SS
U
. C
• C
SS
SS
) to t
: from Equation (10)
is given by:
S
W
= 20mΩ.
CL(CHARGE)
T
IN(MAX)
= 302nF. Select
SS
SS
C
= 100nF was
SS
SS
response.
U
= 2.2A.
= 437nF.
is a good
SOA
(14)
(15)
for
Consult MOSFET SOA curves: the IRF530S can handle
3.3A at 100V for 8.3ms, so it is safe to use in this
application.
Calculate C
C
FREQUENCY COMPENSATION
The LTC4253 typical frequency compensation network for
the analog current limit loop is a series R
connected from GATE to V
ship between the compensation capacitor C
MOSFET’s C
starting value for C
specification. Optimized values for C
several popular MOSFETs. Differences in the optimized
value of C
less, compensation values should be verified by board
level short-circuit testing.
As seen in Figure 5, at the onset of a short-circuit event, the
input supply voltage can ring dramatically due to series
inductance. If this voltage avalanches the MOSFET, cur-
rent continues to flow through the MOSFET to the output.
The analog current limit loop cannot control this current
flow and therefore the loop undershoots. This effect
cannot be eliminated by frequency compensation. A zener
diode is required to clamp the input supply voltage and
prevent MOSFET avalanche.
SS
= 33nF.
Figure 6. Recommended Compensation
Capacitor C
C
60
50
40
30
20
10
versus the starting value are small. Neverthe-
0
SS
ISS
0
IRF530
: using Equations (14) and (15) select
. The line in Figure 6 is used to select a
IRF740
IRF540
C
2000
vs MOSFET C
C
IRF3710
MOSFET C
based upon the MOSFET’s C
EE
4000
. Figure 6 depicts the relation-
ISS
(pF)
ISS
6000
NTY100N10
for the LTC4253
C
4253 F06
C
are shown for
8000
(10Ω) and C
C
and the
425353afc
ISS
C