CS1D-DPL02D Omron, CS1D-DPL02D Datasheet - Page 341
CS1D-DPL02D
Manufacturer Part Number
CS1D-DPL02D
Description
CS1D Dual IO Exp
Manufacturer
Omron
Datasheet
1.CS1D-SP002.pdf
(638 pages)
Specifications of CS1D-DPL02D
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Forcing Bit Status
Timer Accuracy
306
Timer Area
TIMER: TIM or TIMX
HIGH-SPEED TIMER:
TIMH(015) or TIMHX(551)
ONE-MS TIMER:
TMHH(540) or TMHHX(552)
ACCUMULATIVE TIMER:
TTIM(087) or TTIMX(555)
TIMER WAIT: TIMW(813) or
TIMWX(816)
HIGH-SPEED TIMER WAIT:
TMHW(815) or TMHWX(817)
Instruction name
Note
PV
Flag
Mode change
The following table shows when timer PVs and Completion Flags will be reset.
1. If the IOM Hold BIt (A50012) is ON, the PV and Completion Flag will be
2. If the IOM Hold BIt (A50012) is ON and the PLC Setup’s “IOM Hold Bit Sta-
3. Since the TIML(542), TIMLX(553), MTIM(543), and MTIMX(554) instruc-
4. The present value of TIM, TIMX, TIMH(015), TIMHX(551), TMHH(540),
Timer Completion Flags can be force-set and force-reset.
Timer PVs cannot be force-set or force-reset, although the PVs can be
refreshed indirectly by force-setting/resetting the Completion Flag.
The accuracy of timers is different for Duplex CPU Systems than for Single
CPU Systems or CS1-H CPU Units.
Accuracy in Normal Operation
The following table shows the timer accuracy in normal operation.
TIMER: TIM or TIMX
HIGH-SPEED TIMER:
TIMH(015) or TIMHX(551)
ONE-MS TIMER: TMHH(540) or
TMHHX(552)
ACCUMULATIVE TIMER:
TTIM(087) or TTIMX(555)
MULTI-OUTPUT TIMER: MTIM(543) or
MTIMX(554)
TIMER WAIT: TIMW(813) or TIMWX(816)
HIGH-SPEED TIMER WAIT:
TMHW(815) or TMHWX(817)
Effect on PV and Completion Flag
0
OFF
retained when a fatal error occurs or the operating mode is changed from
PROGRAM mode to RUN or MONITOR mode or vice-versa. The PV and
Completion Flag will be cleared when power is cycled.
tus at Startup” setting is set to protect the IOM Hold Bit, the PV and Com-
pletion Flag will be retained when the PLC’s power is cycled.
tions do not use timer numbers, they are reset under different conditions.
Refer to the descriptions of these instructions for details.
TMHHX(552), TIMW(813), TIMWX(816), TMHW(815), and TMHWX(817)
timers are held when the timer is jumped between JMP and JME instruc-
tions or when in a task that is on standby.
1
PLC start-up
PV
Flag
Timer
0
OFF
2
PV
Flag
CNR(545) or
CNRX(547)
9999
OFF
( 10 ms to 0 ms) + (0 ms to
cycle time)
Tasks on standby
PV Maintained
(JMP-JME) or
Jumps
Jumps and Interlocks
Accuracy
Operation in
4
PV
(Reset to SV.)
Flag
PV Maintained
---
---
Section 8-13
Interlocks
(IL-ILC)
SV
OFF
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