NTMC1300R2 ON Semiconductor, NTMC1300R2 Datasheet - Page 5

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NTMC1300R2

Manufacturer Part Number
NTMC1300R2
Description
MOSFET N/P-CH DUAL 3A 30V 8SOIC
Manufacturer
ON Semiconductor
Datasheet

Specifications of NTMC1300R2

Fet Type
N and P-Channel
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
90 mOhm @ 3A, 10V
Drain To Source Voltage (vdss)
30V
Current - Continuous Drain (id) @ 25° C
2.2A, 1.8A
Vgs(th) (max) @ Id
2.2V @ 250µA
Gate Charge (qg) @ Vgs
5nC @ 4.5V
Input Capacitance (ciss) @ Vds
300pF @ 20V
Power - Max
2W
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
NTMC1300R2OS
5
4
3
2
1
0
100
500
400
300
200
100
10
0
Drain−To−Source Voltage versus Total Charge
1
0
V
1
10
DS
C
V
I
V
C
D
Q
iss
DD
GS
rss
0.5
= 1.0 A
gs
GATE−TO−SOURCE OR DRAIN−TO−SOURCE
Figure 17. Resistive Switching Time
Figure 15. Gate−To−Source and
= 24 V
= 10 V
Variation versus Gate Resistance
V
5
Q
DS
Figure 13. Capacitance Variation
g
R
, TOTAL GATE CHARGE (nC)
= 0 V
1
G
, GATE RESISTANCE (OHMS)
V
GS
0
VOLTAGE (VOLTS)
1.5
V
V
DS
GS
Q
N−Channel
Q
T
= 0 V
gd
10
5
2
2.5
10
I
T
D
J
V
= 3 A
= 25°C
GS
T
3
15
J
= 25°C
t
t
t
t
http://onsemi.com
d(on)
d(off)
f
r
C
C
3.5
C
oss
rss
iss
20
16
12
8
4
0
100
20
5
5
4
3
2
1
0
100
0
700
600
800
500
400
300
200
100
10
Drain−To−Source Voltage versus Total Charge
1
0
Q
1
10
gs
1
C
C
V
I
V
D
Figure 18. Resistive Switching Time
rss
DD
GS
iss
V
= −1.0 A
Variation versus Gate Resistance
GATE−TO−SOURCE OR DRAIN−TO−SOURCE
Figure 16. Gate−To−Source and
DS
2
= −24 V
= −10 V
5
Q
−V
= 0 V V
g
Figure 14. Capacitance Variation
, TOTAL GATE CHARGE (nC)
Q
R
GS
3
G,
gd
0
GATE RESISTANCE (OHMS)
−V
V
GS
4
DS
DS
VOLTAGE (VOLTS)
= 0 V
5
P−Channel
Q
5
T
10
10
6
7
15
I
T
D
J
8
= −3 A
= 25°C
20
V
GS
T
9
J
= 25°C
t
t
t
t
25
d (off)
d (on)
r
10
f
C
C
C
20
18
16
14
12
10
8
6
4
2
0
oss
iss
rss
100
30

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