CS4220-KSZR Cirrus Logic Inc, CS4220-KSZR Datasheet - Page 18

• Manufacturer Part Number: CS4220-KSZR
• Description: Audio CODECs IC 24Bit Str Audio CODEC 3V Intrfc
• Manufacturer: Cirrus Logic Inc

Specifications of CS4220-KSZR

• Number Of Adc Inputs: 2
• Number Of Dac Outputs: 2
• Conversion Rate: 48 KSPs
• Interface Type: Serial (I2C, SPI)
• Resolution: 24 bit
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: SOIC-28
• Minimum Operating Temperature: - 10 C
• Number Of Channels: 2 ADC, 2 DAC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6. PIN DESCRIPTIONS — CS4220
18
NC
XTI, XTO
LRCK
SCLK
VD
DGND
SDOUT
SDIN
1,14,15, 28 No Connect - These pins are not connected internally and should be tied to DGND to mini-
2,3
4
5
6
7
8
9
mize noise coupling.
Crystal Connections ( Input/Output ) - Input and output connections for the crystal used to
clock the CS4220. Alternatively, a clock may be input into XTI. This is the clock source for the
delta-sigma modulator and digital filters. The frequency of this clock must be either 256x, 384x,
or 512x Fs in Slave Mode and 256x in Master Mode.
Left/Right Clock ( Input ) - Determines which channel is currently being input/output of the
serial audio data pins SDIN/SDOUT. The frequency of the Left/Right clock must be equal to the
input sample rate. Although the outputs for each ADC channel are transmitted at different
times, Left/Right pairs represent simultaneously sampled analog inputs. The required relation-
ship between the left/right clock, serial clock and serial data is defined by the DIF1-0 pins. The
options are detailed in Figures 8 - 11.
Serial Data Clock ( Input ) - Clocks the individual bits of the serial data into the SDIN pin and
out of the SDOUT pin. The required relationship between the left/right clock, serial clock and
serial data is defined by the DIF1-0 pins. The options are detailed in Figures 8 - 11.
Digital Power ( Input ) - Positive power supply for the digital section. Typically 5.0 VDC.
Digital Ground ( Input ) - Digital ground for the digital section.
Serial Data Output ( Output ) - Two’s complement MSB-first serial data is output on this pin.
The required relationship between the left/right clock, serial clock and serial data is defined by
the DIF1-0 pins. The options are detailed in Figures 8 - 11.
Serial Data Input ( Input ) - Two’s complement MSB-first serial data is input on this pin. The
required relationship between the left/right clock, serial clock and serial data is defined by the
DIF1-0 pins. The options are detailed in Figures 8 - 11.
Fs (kHz)
44.1
32
48
SDOUT
SDOUT
DGND
DGND
DEM0
DEM0
LRCK
LRCK
SCLK
SCLK
SDIN
SDIN
DIF1
DIF1
DIF0
DIF0
XTO
XTO
XTI
XTI
Table 2. Common Clock Frequencies
NC
NC
VD
VD
NC
NC
VL
VL
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
11.2896
12.2880
8.1920
256x
CS4220
CS4220
28
28
27
27
26
26
25
25
24
24
23
23
22
22
21
21
20
20
19
19
18
18
17
17
16
16
15
15
NC
NC
RST
RST
AOUTL-
AOUTL-
AOUTL+
AOUTL+
AOUTR+
AOUTR+
AOUTR-
AOUTR-
AGND
AGND
VA
VA
AINL+
AINL+
AINL-
AINL-
DEM1
DEM1
AINR+
AINR+
AINR-
AINR-
NC
NC
XTI (MHz)
12.2880
16.9344
18.4320
384x
16.3840
22.5792
24.5760
512x
CS4220 CS4221
DS284PP3