M41T11MH6 STMicroelectronics, M41T11MH6 Datasheet - Page 15

• Manufacturer Part Number: M41T11MH6
• Description: Real Time Clock Serial 512 (64x8)
• Manufacturer: STMicroelectronics

Specifications of M41T11MH6

• Function: Clock, Calendar, Timekeeper
• Rtc Memory Size: 64 B
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Rtc Bus Interface: Serial
• Package / Case: SO-28
• Time Format: HH:MM:SS
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

M41T11
3.1
Table 3.
1. Keys:
2. When CEB is set to '1', CB will toggle from '0' to '1' or from '1' to '0' every 100 years (dependent upon the
Clock calibration
The M41T11 is driven by a quartz controlled oscillator with a nominal frequency of
32,768 Hz. The devices are tested not to exceed 35 ppm (parts per million) oscillator
frequency error at 25°C, which equates to about ±1.53 minutes per month. With the
calibration bits properly set, the accuracy of each M41T11 improves to better than ±2 ppm
at 25°C.
The oscillation rate of any crystal changes with temperature (see
Most clock chips compensate for crystal frequency and temperature shift error with
cumbersome trim capacitors. The M41T11 design, however, employs periodic counter
correction. The calibration circuit adds or subtracts counts from the oscillator divider circuit
at the divide by 256 stage, as shown in
are blanked (subtracted, negative calibration) or split (added, positive calibration) depends
upon the value loaded into the five-bit calibration byte found in the control register. Adding
counts speeds the clock up, subtracting counts slows the clock down.
The calibration byte occupies the five lower order bits (D4-D0) in the control register (addr
7). This byte can be set to represent any value between 0 and 31 in binary form. Bit D5 is a
sign bit; '1' indicates positive calibration, '0' indicates negative calibration. Calibration occurs
within a 64 minute cycle. The first 62 minutes in the cycle may, once per minute, have one
second either shortened by 128 or lengthened by 256 oscillator cycles. If a binary '1' is
loaded into the register, only the first 2 minutes in the 64 minute cycle will be modified; if a
binary 6 is loaded, the first 12 will be affected, and so on.
Therefore, each calibration step has the effect of adding 512 or subtracting 256 oscillator
cycles for every 125,829,120 actual oscillator cycles, that is +4.068 or –2.034 ppm of
Address
S = SIGN bit
FT = FREQUENCY TEST bit
ST = STOP bit
OUT = Output level
X = Don’t care
CEB = Century enable bit
CB = Century bit
initial value set). When CEB is set to '0', CB will not toggle.When CEB is set to '1', CB will toggle from '0' to
'1' or from '1' to '0' every 100 years (dependent upon the initial value set). When CEB is set to '0', CB will
not toggle.
0
1
2
3
4
5
6
7
CEB
OUT
D7
ST
Register map
X
X
X
X
(2)
CB
D6
10 years
FT
X
X
X
10 seconds
10 minutes
D5
10 hours
X
X
S
(1)
10 date
10 M.
D4
X
Data
Figure 13 on page
D3
X
Calibration
D2
Seconds
Minutes
Month
Hours
Years
Date
Day
D1
17. The number of times pulses
D0
Figure 12 on page
Century/hours 0-1/00-23
Seconds
Minutes
Control
Month
Function/range
Date
Year
Day
BCD format
Clock operation
00-59
00-59
01-07
01-31
01-12
00-99
17).
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