CY28442ZXC-2 Silicon Laboratories Inc, CY28442ZXC-2 Datasheet - Page 8

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CY28442ZXC-2

Manufacturer Part Number
CY28442ZXC-2
Description
Clock Generators & Support Products Calistoga
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of CY28442ZXC-2

Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY28442ZXC-2
Manufacturer:
CYP
Quantity:
20 000
Part Number:
CY28442ZXC-2T
Manufacturer:
TI
Quantity:
11
Rev 1.0, November 21, 2006
Byte 8: Control Register 8 (continued)
Byte 9: Control Register 9
Byte 10: Control Register 10
7
6
5
4
3
2
1
0
1
0
7
6
5
4
3
2
1
0
Bit
Bit
Bit
@Pup
@Pup
@Pup
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
CLKREQ#A
RESERVED
S3
S2
S1
S0
96_100 SEL
96_100 Enable
96_100 SS Enable
96_100 SW HW
RESERVED
CLKREQ#B
CLKREQ#B
RESERVED
CLKREQ#A
CLKREQ#A
CLKREQ#A
CLKREQ#A
Name
Name
Name
SRC[T/C]2 CLKREQ#A control
1 = SRC[T/C]2 stoppable by CLKREQ#A pin
0 = SRC[T/C]2 not controlled by CLKREQ#A pin
RESERVED
96_100_SSC Spread Spectrum Selection table:
S[3:0]
‘0000’ = –0.8%(Default value)
‘0001’ = –1.0%
‘0010’ = –1.25%
‘0011’ = –1.5%
‘0100’ = –1.75%
‘0101’ = –2.0%
‘0110’ = –2.5%
‘0111’ = –0.5%
‘1000’ = ±0.25%
‘1001’ = ±0.4%
‘1010’ = ±0.5%
‘1011’ = ±0.6%
‘1100’ = ±0.8%
‘1101’ = ±1.0%
‘1110’ = ±1.25%
‘1111’ = ±1.5%
Software select 96_100_SSC output frequency, 0 = 96 MHz, 1 = 100 MHz.
96_100_SSC Enable, 0 = Disable, 1 = Enable.
96_100_SSC Spread spectrum enable. 0 = Disable, 1 = Enable.
Select output frequency of 96_100_SSC via software or hardware
0 = Hardware, 1 = Software.
RESERVED
SRC[T/C]4 CLKREQ#B control
1 = SRC[T/C]4 stoppable by CLKREQ#B pin
0 = SRC[T/C]4not controlled by CLKREQ#B pin
SRC[T/C]2 CLKREQ#B control
1 = SRC[T/C]2 stoppable by CLKREQ#B pin
0 = SRC[T/C]2 not controlled by CLKREQ#B pin
RESERVED
SRC[T/C]7CLKREQ#A control
1 = SRC[T/C]7 stoppable by CLKREQ#A pin
0 = SRC[T/C]7 not controlled by CLKREQ#A pin
SRC[T/C]5 CLKREQ#A control
1 = SRC[T/C]5 stoppable by CLKREQ#A pin
0 = SRC[T/C]5 not controlled by CLKREQ#A pin
SRC[T/C]3 CLKREQ#A control
1 = SRC[T/C]3 stoppable by CLKREQ#A pin
0 = SRC[T/C]3 not controlled by CLKREQ#A pin
SRC[T/C]1 CLKREQ#A control
1 = SRC[T/C]1 stoppable by CLKREQ#A pin
0 = SRC[T/C]1 not controlled by CLKREQ#A pin
SS%
Description
Description
Description
CY28442-2
Page 8 of 19

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