MCP79412T-I/MS Microchip Technology, MCP79412T-I/MS Datasheet - Page 12

• Manufacturer Part Number: MCP79412T-I/MS
• Description: Real Time Clock I2C GP RTCC 1Kb EE 64B SRAM EUI-64
• Manufacturer: Microchip Technology
• Series: -r
• Type: Clock/Calendarr

Specifications of MCP79412T-I/MS

• Function: Clock/Calendar
• Rtc Memory Size: 64 Byte
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Rtc Bus Interface: I2C
• Supply Current: 1 uA
• Features: Alarm, Leap Year, NVSRAM, Square Wave Output, Unique ID
• Memory Size: 64B
• Time Format: HH:MM:SS (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C
• Voltage - Supply: 1.8 V ~ 5.5 V
• Voltage - Supply, Battery: 1.3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

MCP7941X
4.1.1
0x00h – Contains the BCD seconds and 10 seconds.
The range is 00 to 59. The ST bit in this register is
used to start or stop the on-board crystal oscillator.
Setting this bit to a ‘1’ starts the oscillator and clearing
this bit to a ‘0’ stops the on-board oscillator.
0x01h – Contains the BCD minutes in bits 3:0 and 10
minutes in bits 6:4. The range is 00 to 59.
0x02h – Contains the BCD hour in bits 3:0. Bits 5:4
contain either the 10 hour in BCD for 24-hour format or
the AM/PM indicator and the 10-hour bit for 12-hour
format. Bit 6 determines the hour format. Setting this
bit to ‘0’ enables 24-hour format, setting this bit to ‘1’
enables 12-hour format.
0x03h – Contains the BCD day. The range is 1-7.
Additional bits are also used for configuration and
status.
• Bit 3 is the VBATEN bit. If this bit is set, the Clock
• Bit 4 is the V
• Bit 5 is the OSCON bit. This is set and cleared by
0x04h – Contains the BCD date and 10 date. The
range is 01-31. Bits 5:4 contain the 10’s date and bits
4:0 contain the date.
0x05h – Contains the BCD month. Bit 4 contains the
10 month. Bit 5 is the Leap Year bit, which is set during
a leap year and is read-only.
0x06h – Contains the BCD year and 10 year. The
Range is 00-99.
0x07h – Is the Control register.
• Bit 7 is the OUT bit. This sets the logic level on the
• Bit 6 is the SQWE bit. Setting this bit enables the
• Bits 5:4 determine which alarms are active.
DS22266C-page 12
and SRAM are powered from the V
when V
disconnected and the only current drain on the
external battery is the V
when the V
the Oscillator and the RTCC registers. This bit is
cleared by software. Clearing this bit will also
clear all the time-stamp registers.
hardware. If this bit is set, the oscillator is running,
if cleared, the oscillator is not running. This bit
does not indicate that the oscillator is running at
the correct frequency. The RTCC will wait 32
oscillator cycles before the bit is set. The RTCC
will wait roughly 32 clock cycles to clear this bit.
This bit will remain clear if the oscillator is not run-
ning.
MFP when not using this as a square wave out-
put.
divided output from the crystal oscillator.
- 00 – No Alarms are active
- 01 – Alarm 0 is active
- 10 – Alarm 1 is active
- 11 – Both Alarms are active
CC
RTCC REGISTER ADDRESSES
falls. If this bit is ‘0’ then the V
CC
BAT
falls and the V
bit. This bit is set by hardware
BAT
pin leakage.
BAT
is used to power
BAT
supply
BAT
pin is
• Bit 3 is the EXTOSC enable bit. Setting this bit will
• Bit 2:0 sets the internal divider for the 32.768 kHz
0x08h is the Calibration register. This is an 8-bit
register that is used to add or subtract clocks from the
RTCC counter every minute. The MSB is the sign bit
and indicates if the count should be added or
subtracted. The remaining 7 bits, with each bit adding
or subtracting 2 clocks, give the user the ability to add
or subtract up to 254 clocks per minute.
0x09h is the unlock sequence address. To unlock write
access to the unique ID area in the EEPROM, a
sequence must be written to this address in separate
commands.
Section 4.2.2 “Unlock
0x0Ah-0x0fh and 0x11-0x16h are the Alarm 0 and
Alarm 1 registers. The Hour, Minute and seconds have
the same structure as the RTCC time registers. The
12/24 bit is a copy of 0x02:6 and does not support a
different configuration for the alarms.
Locations 0x10h and 0x17h are reserved and should
not be used to allow for future device compatibility.
0x0Dh/0x14h has additional bits for alarm configu-
ration.
• ALMxPOL: This bit specifies the level that the
• ALMxIF: This is the Alarm Interrupt Fag. This bit is
allow an external 32.768 kHz signal to drive the
RTCC registers eliminating the need for an
external crystal.
oscillator to be driven to the MFP. The duty cycle is
50%. The output is responsive to the Calibration
register. The following frequencies are available:
- 000 – 1 Hz
- 001 – 4.096 kHz
- 010 – 8.192 kHz
- 011 – 32.768 kHz
- 1xx enables the Cal output function. Cal
Note:
MFP will drive when the alarm is triggered.
ALM2POL is a copy of ALM1POL. The default
state of the MFP when used for alarms is the
inverse of ALM1POL.
set in hardware if the alarm was triggered. The bit
is cleared in software.
output appears on MFP if SQWE is set (64
Hz Nominal). See
tion”
for more details.
The RTCC counters will continue to
increment during the calibration.
The
 2010-2011 Microchip Technology Inc.
process
Section 4.2.3 “Calibra-
Sequence”.
is
fully
detailed
in