MCP79412T-I/MS Microchip Technology, MCP79412T-I/MS Datasheet - Page 21

• Manufacturer Part Number: MCP79412T-I/MS
• Description: Real Time Clock I2C GP RTCC 1Kb EE 64B SRAM EUI-64
• Manufacturer: Microchip Technology
• Series: -r
• Type: Clock/Calendarr

Specifications of MCP79412T-I/MS

• Function: Clock/Calendar
• Rtc Memory Size: 64 Byte
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Rtc Bus Interface: I2C
• Supply Current: 1 uA
• Features: Alarm, Leap Year, NVSRAM, Square Wave Output, Unique ID
• Memory Size: 64B
• Time Format: HH:MM:SS (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C
• Voltage - Supply: 1.8 V ~ 5.5 V
• Voltage - Supply, Battery: 1.3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5.2.4.3
Sequential reads are initiated in the same way as a
random read except that after the MCP7941X transmits
the first data byte, the master issues an Acknowledge
as opposed to the Stop condition used in a random
read. This Acknowledge directs the MCP7941X to
transmit the next sequentially addressed 8-bit word
(Figure
FIGURE 5-2:
FIGURE 5-3:
5.3
The MCP7941X features an additional 64-bit unique ID
area. This is separate and in addition to the 1K of on-
board EEPROM.
The unique ID is located at addresses 0xF0 through
0xF7. Reading the unique ID requires the user to
simply address these bytes.
The unique ID area is protected to prevent unintended
writes to these locations. The unlock sequence is
detailed in
The unique ID can be factory programmed on some
devices to provide a unique IEEE EUI-48 or EUI-64
value. In addition, customer-provided codes can also
be programmed. Please contact your Microchip sales
channel for more information.
 2010-2011 Microchip Technology Inc.
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
5-3). Following the final byte transmitted to the
Unique ID
4.2.2 “Unlock
Sequential Read
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
RANDOM READ (EEPROM SHOWN)
SEQUENTIAL READ (EEPROM SHOWN)
CONTROL
BYTE
Sequence”.
S
S
T
A
R
T
1 0 1 0
A
C
K
CONTROL
BYTE
1 1 1
DATA n
0
A
C
K
A
C
K
ADDRESS
BYTE
DATA n + 1
master, the master will NOT generate an Acknowledge
but will generate a Stop condition. To provide
sequential reads, the MCP7941X contains an internal
Address Pointer which is incremented by one at the
completion of each operation. This Address Pointer
allows the entire memory contents to be serially read
during one operation. The internal Address Pointer will
automatically roll over to the start of the Block.
A
C
K
S
S
T
A
R
T
1 0 1 0
A
C
K
CONTROL
DATA n + 2
BYTE
1
A
C
K
A
C
K
MCP7941X
BYTE
DATA
DATA n + X
DS22266C-page 21
N
O
A
C
K
S
T
O
P
P
N
O
A
C
K
P
S
T
O
P