LX128V-5FN208C Lattice, LX128V-5FN208C Datasheet - Page 50

• Manufacturer Part Number: LX128V-5FN208C
• Description: Analog & Digital Crosspoint ICs 128 I/O Switch Matrix, 3.3V, SERDES, 5ns, Pb-Free
• Manufacturer: Lattice

Specifications of LX128V-5FN208C

• Maximum Dual Supply Voltage: 3.6 V
• Minimum Dual Supply Voltage: 3 V
• Mounting Style: SMD/SMT
• Number Of Arrays: 1
• Operating Supply Voltage: 3.3 V
• Supply Type: Triple
• Configuration: 128 x 128
• Package / Case: FPBGA-208
• Data Rate: 21 Gbps
• Input Level: Bus LVDS, LVCMOS, LVDS, LVPECL, LVTTL
• Output Level: Bus LVDS, LVCMOS, LVDS, LVPECL, LVTTL
• Maximum Operating Temperature: + 90 C
• Minimum Operating Temperature: 0 C
• Product: Digital Crosspoint
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Power Consumption
Power Estimation Coefficients – Core and PLL
Power Estimation Coefficients – sysHSI
ispGDX2-256
ispGDX2-256
Device
Device
200
150
100
50
0
0
I
K
K
K
K
K
K
K
K
K
K
K
DC
REF
IN
CORE
PLLD
PLLA
RXD
RXSTBY
RXA
TXD
TXSTBY
TXA
50
:
:
:
:
:
:
:
:
:
100
:
:
:
150
V
V
I
3.3
2.5
1.8
3.3
2.5
1.8
CORE
Blank chip background current
Reference voltage circuit current per bank
I/O current per input per MHz
Core current per MHz with GRP fanout of 1
PLL logic current per MHz per PLL
PLL analog portion current per MHz per PLL
MHz
CC
CC
200
Receiver Logic current per Mbps
Receiver Logic standby current
Receiver Analog portion current per Mbps
Transmitter Logic current per Mbps
Transmitter Logic standby current
Transmitter Analog portion current per Mbps
250
I
300
DC
K
0.027
0.027
0.019
10.0
10.0
4.0
RXD
(mA)
350
90
80
70
60
50
40
30
20
10
0
0
K
RXSTBY
K
3.25
3.13
3.00
200
1.3
1.3
3.7
REF
400
I
47
HSI
Mbps
600
0.0139
0.0139
0.0213
0.0023
0.0023
0.0040
K
K
800
RXA
IN
1000
I
I
HSI_D
HSI_A
1200
K
0.292
0.292
0.239
0.011
0.011
0.011
K
CORE
TXD
ispGDX2 Family Data Sheet
100
80
60
40
20
0
0
K
K
0.157
0.157
0.179
TXSTBY
PLLD
2.4
2.4
1.2
200
I
PLL
MHz
400
0.0018
0.0018
0.0023
K
0.024
0.024
0.024
K
I
I
PLLA
PLL_D
PLL_A
TXA
600