ispGDX160V-5Q208 Lattice, ispGDX160V-5Q208 Datasheet - Page 20

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ispGDX160V-5Q208

Manufacturer Part Number
ispGDX160V-5Q208
Description
Analog & Digital Crosspoint ICs USE ispGDX2
Manufacturer
Lattice
Datasheet

Specifications of ispGDX160V-5Q208

Maximum Dual Supply Voltage
3.6 V
Minimum Dual Supply Voltage
2.3 V, 3 V
Mounting Style
SMD/SMT
Number Of Arrays
1
Operating Supply Voltage
2.5 V, 3.3 V
Supply Type
Dual
Configuration
Programmable
Package / Case
PQFP-208
Input Level
TTL
Output Level
TTL
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Product
Digital Crosspoint
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISPGDX160V-5Q208
Manufacturer:
QLOGIC
Quantity:
12 388
Part Number:
ISPGDX160V-5Q208
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
ispGDX160V timings are specified with a GRP load
(fanout) of four I/O cells. The figure below shows the ∆
GRP Delay with increased GRP loads. These deltas
External Timing Parameters (Continued)
ispGDX160V Maximum
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0 4 10
20
I/O Cell Fanout
GRP Delay vs. I/O Cell Fanout
19
30
apply to any signal path traversing the GRP (MUXA-D,
OE, CLK/CLKEN, MUXsel0-1). Global Clock signals
which do not use the GRP have no fanout delay adder.
Specifications ispGDX160V
40
50
60
70

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