COM20019I3V-DZD SMSC, COM20019I3V-DZD Datasheet - Page 57

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COM20019I3V-DZD

Manufacturer Part Number
COM20019I3V-DZD
Description
Network Controller & Processor ICs ARCNET Contrllr
Manufacturer
SMSC
Datasheet

Specifications of COM20019I3V-DZD

Product
Controller Area Network (CAN)
Number Of Transceivers
1
Data Rate
312.5 Kbps
Supply Voltage (max)
5.5 V
Supply Voltage (min)
3 V
Supply Current (max)
25 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Package / Case
PLCC-28
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
SMSC COM20019I 3.3V
Cost Competitive ARCNET (ANSI 878.1) Controller with 2K x 8 On-Chip RAM
D0-D7
A0-A2
DIR
nDS
nCS
Figure 8.8 - NON-MULTIPLEXED BUS, 68XX-LIKE CONTROL SIGNALS; READ CYCLE
**
Note 1:
Note 2:
*
T
T
T
T
t10
t11
ARB
ARB
ARB
opr
t1
t3
t4
t6
t2
t5
t7
t8
t9
t8 is measured from the latest active (valid) timing among nCS, nDS, A0-A2.
is the period of operation clock. Same as the XTAL1 period.
is the Arbitration Clock Period
is identical to T
is twice T
The Microcontroller typically accesses the COM20019 on every other cycle.
Therefore, the cycle time specified in the microcontroller's datasheet
should be doubled when considering back-to-back COM20019 cycles.
Read cycle for Address Pointer Low/High Registers occurring after an access
to Data Register requires a minimum of 5T
the leading edge of the next nDS.
Address Setup to nDS Active
Address Hold from nDS Inactive
nCS Setup to nDS Active
nCS Hold from nDS Inactive
DIR Setup to nDS Active
Cycle Time (nDS Low to Next Time Low)
DIR Hold from nDS Inactive
nDS Low to Valid Data
nDS High to Data High Impedence
nDS Low Width
nDS High Width
opr
if SLOW ARB = 1
opr
t1
if SLOW ARB = 0
t5
CASE 2: RBUSTMG bit = 1
t3
Parameter
DATASHEET
t8
Page 57
VALID
ARB
from the trailing edge of nDS to
t10
t6
VALID DATA
4T
min
ARB
100
10
10
30
-5
-5
0
0
0
*+30
max
60**
20
t9
t2
t7
t4
Note 2
t11
units
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
Rev. 11-07-08

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