DS33R11 Maxim Integrated Products, DS33R11 Datasheet - Page 201
DS33R11
Manufacturer Part Number
DS33R11
Description
Network Controller & Processor ICs Ethernet Mapper with Integrated T1-E1-J1
Manufacturer
Maxim Integrated Products
Datasheet
1.DS33R11.pdf
(344 pages)
Specifications of DS33R11
Product
Framer
Number Of Transceivers
1
Supply Voltage (max)
1.89 V, 3.465 V
Supply Voltage (min)
1.71 V, 3.135 V
Supply Current (max)
100 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Package / Case
BGA
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11.7 T1/E1/J1 Transceiver Registers
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 2 – 3: Test Mode Bits (TEST0, TEST1) Test modes are used to force the output pins of the transceiver into
known states. This can facilitate the checkout of assemblies during the manufacturing process and also be used to
isolate devices from shared buses.
Bit 1: Transceiver Operating Mode (T1/E1) Used to select the operating mode of the framer/formatter (digital)
portion of the Transceiver. The operating mode of the LIU must also be programmed.
Bit 0: Software-Issued Reset (SFTRST) A 0-to-1 transition causes the register space in the T1/E1/J1 transceiver
to be cleared. A reset clears all configuration and status registers. The bit automatically clears itself when the reset
has completed.
TEST1
0
0
1
1
0 = T1 operation
1 = E1 operation
TEST0
—
0
1
0
1
7
0
Operate normally
Force all output pins into tri-state (including all I/O pins and parallel port pins)
Force all output pins low (including all I/O pins except parallel port pins)
Force all output pins high (including all I/O pins except parallel port pins)
TR.MSTRREG
Master Mode Register
00h
—
6
0
—
5
0
Effect On Output Pins
201 of 344
—
0
4
TEST1
3
0
TEST0
2
0
T1/E1
1
0
SFTRST
0
0
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