DS33R11 Maxim Integrated Products, DS33R11 Datasheet - Page 55

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DS33R11

Manufacturer Part Number
DS33R11
Description
Network Controller & Processor ICs Ethernet Mapper with Integrated T1-E1-J1
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS33R11

Product
Framer
Number Of Transceivers
1
Supply Voltage (max)
1.89 V, 3.465 V
Supply Voltage (min)
1.71 V, 3.135 V
Supply Current (max)
100 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Package / Case
BGA

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DS33R11 Ethernet Mapper with Integrated T1/E1/J1 Transceiver
Figure 9-3. Flow Control Using Pause Control Frame
8
Receive Queue Low
Water
Rx
Receive Queue High
Data
Water Mark
Initiate Flow control
Receive Queue
Growth
9.13.2 Half Duplex Flow Control
Half duplex flow control uses a jamming sequence to exert backpressure on the transmitting node. The receiving
node jams the first 4 bytes of a packet that are received from the MAC in order to cause collisions at the distant
end. In both 100Mbit/s and 10Mbit/s MII/RMII modes, 4 bytes are jammed upon reception of a new frame. Note
that the jamming mechanism does not jam the current frame that is being received during the watermark crossing,
but will wait to jam the next frame after the
SU.RQHT
bit is set. If the queue remains above the high threshold,
received frames will continue to be jammed. This jam sequence is stopped when the queue falls below the high
threshold.
9.13.3 Host-Managed Flow Control
Although automatic flow control is recommended, flow control by the host processor is also possible. By utilizing
the high watermark interrupts, the host processor can manually issue pause frames or jam incoming packets to
exert backpressure on the transmitting node. Pause frames can be initiated with SU.MACFCR.FCB bit. Jam
sequences can be initiated be setting SU.GCR.JAME. The host can detect pause frames by monitoring
SU.RFSB3.UF and SU.RFSB3.CF. Jammed frames will be indistinguishable from packet collisions.
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