SI7108DN-T1-E3 Vishay, SI7108DN-T1-E3 Datasheet - Page 10

• Manufacturer Part Number: SI7108DN-T1-E3
• Description: MOSFET N-CH 20V 14A 1212-8
• Manufacturer: Vishay
• Series: TrenchFET®r
• Type: Power MOSFETr

Specifications of SI7108DN-T1-E3

• Transistor Polarity: N-Channel
• Fet Type: MOSFET N-Channel, Metal Oxide
• Fet Feature: Logic Level Gate
• Rds On (max) @ Id, Vgs: 4.9 mOhm @ 22A, 10V
• Drain To Source Voltage (vdss): 20V
• Current - Continuous Drain (id) @ 25° C: 14A
• Vgs(th) (max) @ Id: 2V @ 250µA
• Gate Charge (qg) @ Vgs: 30nC @ 4.5V
• Power - Max: 1.5W
• Mounting Type: Surface Mount
• Package / Case: PowerPAK® 1212-8
• Minimum Operating Temperature: - 55 C
• Configuration: Single Quad Drain Triple Source
• Resistance Drain-source Rds (on): 0.0049 Ohm @ 10 V
• Forward Transconductance Gfs (max / Min): 88 S
• Drain-source Breakdown Voltage: 20 V
• Gate-source Breakdown Voltage: +/- 16 V
• Continuous Drain Current: 14 A
• Power Dissipation: 1500 mW
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Continuous Drain Current Id: 22A
• Drain Source Voltage Vds: 20V
• On Resistance Rds(on): 4.9mohm
• Rds(on) Test Voltage Vgs: 10V
• Threshold Voltage Vgs Typ: 2V
• Number Of Elements: 1
• Polarity: N
• Channel Mode: Enhancement
• Drain-source On-res: 0.0049Ohm
• Drain-source On-volt: 20V
• Gate-source Voltage (max): ±16V
• Operating Temp Range: -55C to 150C
• Operating Temperature Classification: Military
• Mounting: Surface Mount
• Pin Count: 8
• Package Type: PowerPAK 1212
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: SI7108DN-T1-E3TR

AN822
Vishay Siliconix
CONCLUSIONS
As a derivative of the PowerPAK SO-8, the PowerPAK
1212-8 uses the same packaging technology and has
been shown to have the same level of thermal perfor-
mance while having a footprint that is more than 40 %
smaller than the standard TSSOP-8.
Recommended PowerPAK 1212-8 land patterns are
provided to aid in PC board layout for designs using this
new package.
www.vishay.com
4
105
95
85
75
65
55
45
0.00
Figure 5. Spreading Copper - Si7401DN
0 %
0.25
Spreading Copper (sq. in.)
0.50
0.75
1.00
100 %
1.25
1.50
1.75
50 %
2.00
The PowerPAK 1212-8 combines small size with attrac-
tive thermal characteristics. By minimizing the thermal
rise above the board temperature, PowerPAK simplifies
thermal design considerations, allows the device to run
cooler, keeps r
handle more current than a same- or larger-size MOS-
FET die in the standard TSSOP-8 or SO-8 packages.
Figure 6. Spreading Copper - Junction-to-Ambient Performance
130
120
110
100
90
80
70
60
50
0.00
Spreading Copper (sq. in.)
0.25
DS(ON)
0.50
50 %
low, and permits the device to
0.75
1.00
100 %
1.25
Document Number 71681
1.50
1.75
03-Mar-06
0 %
2.00