CS8900A-CQ3R Cirrus Logic Inc, CS8900A-CQ3R Datasheet - Page 5

• Manufacturer Part Number: CS8900A-CQ3R
• Description: Ethernet ICs IC 10Mbps Ethernet Controller 3.3V
• Manufacturer: Cirrus Logic Inc

Specifications of CS8900A-CQ3R

• Ethernet Connection Type: 10Base- 2, 10Base- 5, 10Base- F, 10Base- T
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Product: Ethernet Controllers
• Standard Supported: IEEE 802.3
• Data Rate: 10 Mbps
• Maximum Operating Temperature: + 70 C
• Package / Case: LQFP-100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DS271F5
CS8900A
Crystal LAN™ Ethernet Controller
5.0 OPERATION .......................................................................................................................... 78
5.1 Managing Interrupts and Servicing the Interrupt Status Queue ...................................... 78
5.2 Basic Receive Operation ................................................................................................. 78
5.3 Receive DMA .................................................................................................................. 90
5.4 Auto-Switch DMA ............................................................................................................ 94
4.10.2 TxCMD Port ...................................................................................................... 75
4.10.3 TxLength Port ................................................................................................... 76
4.10.4 Interrupt Status Queue Port ............................................................................. 76
4.10.5 PacketPage Pointer Port .................................................................................. 76
4.10.6 PacketPage Data Ports 0 and 1 ....................................................................... 76
4.10.7 I/O Mode Operation .......................................................................................... 76
4.10.8 Basic I/O Mode Transmit .................................................................................. 76
4.10.9 Basic I/O Mode Receive ................................................................................... 77
4.10.10 Accessing Internal Registers .......................................................................... 77
4.10.11 Polling the CS8900A in I/O Mode ................................................................... 77
5.2.1 Terminology: Packet, Frame, and Transfer ........................................................ 80
5.2.2 Receive Configuration ........................................................................................ 80
5.2.3 Receive Frame Pre-Processing ......................................................................... 82
5.2.4 Held vs. DMAed Receive Frames ...................................................................... 83
5.2.5 Buffering Held Receive Frames ......................................................................... 85
5.2.6 Transferring Held Receive Frames .................................................................... 85
5.2.7 Receive Frame Visibility ..................................................................................... 85
5.2.8 Example of Memory Mode Receive Operation ................................................... 86
5.2.9 Receive Frame Byte Counter ............................................................................. 86
5.2.10 Receive Frame Address Filtering ..................................................................... 87
5.2.11 Configuring the Destination Address Filter ....................................................... 87
5.2.12 Hash Filter ........................................................................................................ 88
5.2.13 Broadcast Frame Hashing Exception ............................................................... 88
5.3.1 Overview ............................................................................................................ 90
5.3.2 Configuring the CS8900A for DMA Operation ....................................................90
5.3.3 DMA Receive Buffer Size ................................................................................... 91
5.3.4 Receive-DMA-Only Operation ............................................................................ 91
5.3.5 Committing Buffer Space to a DMAed Frame ....................................................92
5.3.6 DMA Buffer Organization ................................................................................... 92
5.3.7 RxDMAFrame Bit ............................................................................................... 92
5.3.8 Receive DMA Example Without Wrap-Around ................................................... 92
5.3.9 Receive DMA Operation for RxDMA-Only Mode ............................................... 92
5.2.0.1 Overview ............................................................................................. 78
5.2.1.1 Packet ................................................................................................. 80
5.2.1.2 Frame .................................................................................................. 80
5.2.1.3 Transfer ............................................................................................... 80
5.2.2.1 Configuring the Physical Interface ....................................................... 81
5.2.2.2 Choosing which Frame Types to Accept ............................................. 81
5.2.2.3 Selecting which Events Cause Interrupts ............................................ 81
5.2.2.4 Choosing How to Transfer Frames ...................................................... 81
5.2.3.1 Destination Address Filtering .............................................................. 82
5.2.3.2 Early Interrupt Generation ................................................................... 82
5.2.3.3 Acceptance Filtering ............................................................................ 83
5.2.3.4 Normal Interrupt Generation ................................................................ 83
5.2.10.1 Individual Address Frames ................................................................ 87
5.2.10.2 Multicast Frames ............................................................................... 87
5.2.10.3 Broadcast Frames ............................................................................. 87
5.2.12.1 Hash Filter Operation ........................................................................ 88
CIRRUS LOGIC PRODUCT DATASHEET
5