LX128B-32F208C Lattice, LX128B-32F208C Datasheet - Page 52

• Manufacturer Part Number: LX128B-32F208C
• Description: Analog & Digital Crosspoint ICs 128 I/O Switch Matrix, 2.5V, SERDES, 3.2ns
• Manufacturer: Lattice

Specifications of LX128B-32F208C

• Maximum Dual Supply Voltage: 2.7 V
• Minimum Dual Supply Voltage: 2.3 V
• Mounting Style: SMD/SMT
• Number Of Arrays: 1
• Operating Supply Voltage: 2.5 V
• Supply Type: Triple
• Configuration: 128 x 128
• Package / Case: FPBGA-208
• Data Rate: 21 Gbps
• Input Level: Bus LVDS, LVCMOS, LVDS, LVPECL, LVTTL
• Output Level: Bus LVDS, LVCMOS, LVDS, LVPECL, LVTTL
• Maximum Operating Temperature: + 90 C
• Minimum Operating Temperature: 0 C
• Product: Digital Crosspoint
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Switching Test Conditions
Figure 23 shows the output test load used for AC testing. Specific values for resistance, capacitance, voltage and
other test conditions are shown in Table 7.
Figure 23. Output Test Load, LVTTL and LVCMOS Standards (1.8V)
Table 7. Test Fixture Required Components
Default LVCMOS 1.8 I/O (L -> H, H -> L)
LVCMOS I/O (L -> H, H -> L)
Default LVCMOS 1.8 I/O (Z -> H)
Default LVCMOS 1.8 I/O (Z -> L)
Default LVCMOS 1.8 I/O (H -> Z)
Default LVCMOS 1.8 I/O (L -> Z)
Note: Output test conditions for all other interfaces are determined by the respective standards.
Test Condition
*C
Device
Output
L
includes Test Fixture and Probe Capacitance.
106
106
106
R
—
—
—
1
V
106
106
106
R
—
—
—
CCO
2
49
R
R
1
2
35pF
35pF
35pF
35pF
5pF
5pF
C
L
C
L
LVCMOS2.5 = V
LVCMOS1.8 = V
*
LVCMOS3.3 = 1.5V
Timing Ref.
V
V
OH
OL
V
V
V
CCO
CCO
CCO
ispGDX2 Family Data Sheet
+ 0.15
- 0.15
Point
Test
/2
/2
/2
CCO
CCO
/2
/2
LVCMOS1.8 = 1.65V
LVCMOS3.3 = 3.0V
LVCMOS2.5 = 2.3V
1.65V
1.65V
1.65V
1.65V
V
1.8V
CCO