LX128C-5F208C Lattice, LX128C-5F208C Datasheet - Page 56

• Manufacturer Part Number: LX128C-5F208C
• Description: Analog & Digital Crosspoint ICs 128 I/O Switch Matrix, 1.8V, SERDES, 5ns
• Manufacturer: Lattice

Specifications of LX128C-5F208C

• Maximum Dual Supply Voltage: 1.95 V
• Minimum Dual Supply Voltage: 1.65 V
• Mounting Style: SMD/SMT
• Number Of Arrays: 1
• Operating Supply Voltage: 1.8 V
• Supply Type: Triple
• Configuration: 128 x 128
• Package / Case: FPBGA-208
• Data Rate: 21 Gbps
• Input Level: Bus LVDS, LVCMOS, LVDS, LVPECL, LVTTL
• Output Level: Bus LVDS, LVCMOS, LVDS, LVPECL, LVTTL
• Maximum Operating Temperature: + 90 C
• Minimum Operating Temperature: 0 C
• Product: Digital Crosspoint
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
ispGDX2-64 Logic Signal Connections
GOE0
BK0_IO0/PLL_LOCK0
BK0_IO1
GND
BK0_IO2
BK0_IO3
GND
BK0_IO4/PLL_RST0
BK0_IO5
BK0_IO6
BK0_IO7
GND
TCK
RESETb
BK1_IO0/PLL_FBK0
BK1_IO1
BK1_IO2
BK1_IO3/VREF(0,1)
GND
BK1_IO4
BK1_IO5
GND
BK1_IO6
BK1_IO7
GCLK/CE2
GCLK/CE3
BK2_IO0
BK2_IO1
GND
BK2_IO2
BK2_IO3
GND
BK2_IO4/V
BK2_IO5
BK2_IO6
BK2_IO7
BK3_IO0
BK3_IO1
BK3_IO2
BK3_IO3
GND
BK3_IO4
BK3_IO5
GND
BK3_IO6
BK3_IO7/CLK_OUT0
Signal Name
REF
(2,3)
sysIO
Bank
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
2
2
2
2
2
3
3
3
3
3
3
3
0
0
0
1
1
2
2
2
2
2
3
3
3
-
-
-
-
-
Pair/Polarity
CLK2P
CLK2N
LVDS
10N
11N
12N
13N
14N
15N
10P
11P
12P
13P
14P
15P
0N
0P
1N
1P
2N
2P
3N
3P
4P
4N
5N
6P
6N
7P
7N
8N
9N
5P
8P
9P
-
-
-
-
-
-
-
-
-
-
-
Block
GDX
0A
0A
0A
0A
0A
0A
0A
0A
0A
0A
0A
0A
0A
0A
0A
0A
0B
0B
0B
0B
0B
0B
0B
0B
0B
0B
0B
0B
0B
0B
0B
0B
-
-
-
-
-
-
-
-
-
-
-
-
-
MRB
10
11
12
13
14
15
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
0
1
2
3
4
5
6
7
8
9
-
-
-
-
-
-
-
-
-
-
-
-
-
HSI0A_CDRRSTb
HSI0B_CDRRSTb
SS_CLKOUT0N
SS_CLKOUT0P
SERDES Mode
FIFO0_STRDb
HSI0A_SOUTP
HSI0A_SOUTN
HSI0B_SOUTN
HSI0B_SOUTP
HSI0_CSLOCK
FIFO1_STRDb
HSI0A_SYDT
HSI0B_SYDT
SS_CLKIN1P
SS_CLKIN1N
HSI0A_SINN
HSI0A_SINP
HSI0B_SINP
HSI0B_SINN
53
I/O Pin
Note 4
Note 4
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1
5
5
6
6
HSI0A_RXD0/TXD0
HSI0A_RXD1/TXD1
HSI0A_RXD2/TXD2
HSI0A_RXD3/TXD3
HSI0A_RXD4/TXD4
HSI0A_RXD5/TXD5
HSI0A_RXD6/TXD6
HSI0A_RXD7/TXD7
HSI0A_RXD8/TXD8
HSI0A_RXD9/TXD9
HSI0B_RXD0/TXD0
HSI0B_RXD1/TXD1
HSI0B_RXD2/TXD2
HSI0B_RXD3/TXD3
HSI0B_RXD4/TXD4
HSI0B_RXD5/TXD5
HSI0B_RXD6/TXD6
HSI0B_RXD7/TXD7
HSI0B_RXD8/TXD8
HSI0B_RXD9/TXD9
HSI0A_RECCLK
HSI0B_RECCLK
HSI0BA_SYDT
SERDES Mode
HSI0A_SYDT
I/O Cell
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
ispGDX2 Family Data Sheet
2
5
5
FIFO0_DIN0/DOUT0
FIFO0_DIN1/DOUT1
FIFO0_DIN2/DOUT2
FIFO0_DIN3/DOUT3
FIFO0_DIN4/DOUT4
FIFO0_DIN5/DOUT5
FIFO0_DIN6/DOUT6
FIFO0_DIN7/DOUT7
FIFO0_DIN8/DOUT8
FIFO0_DIN9/DOUT9
FIFO1_DIN1/DOUT1
FIFO1_DIN2/DOUT2
FIFO1_DIN3/DOUT3
FIFO1_DIN4/DOUT4
FIFO1_DIN5/DOUT5
FIFO1_DIN6/DOUT6
FIFO1_DIN7/DOUT7
FIFO1_DIN8/DOUT8
FIFO1_DIN9/DOUT9
FIFO0_FIFORSTb
FIFO1_FIFORSTb
FIFO0_ EMPTY
FIFO Mode I/O
FIFO1_EMPTY
FIFO0_FULL
FIFO1_FULL
FIFO1_DIN0
Cell/Pin
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
3
fpBGA
GND
GND
GND
GND
GND
GND
GND
GND
GND
H10
G10
D10
C10
B10
100
J10
G9
G8
H6
K6
G7
H7
K7
K8
K9
H9
H8
E8
E9
D8
D9
C9
A9
B8
A8
A7
C7
D7
C6
J8
F9
F8
F7
E7
B6
J6
J9