SI2307BDS-T1-E3 Vishay, SI2307BDS-T1-E3 Datasheet - Page 7

• Manufacturer Part Number: SI2307BDS-T1-E3
• Description: MOSFET P-CH 30V 2.5A SOT23-3
• Manufacturer: Vishay
• Series: TrenchFET®r
• Type: Power MOSFETr

Specifications of SI2307BDS-T1-E3

• Transistor Polarity: P-Channel
• Fet Type: MOSFET P-Channel, Metal Oxide
• Fet Feature: Logic Level Gate
• Rds On (max) @ Id, Vgs: 78 mOhm @ 3.2A, 10V
• Drain To Source Voltage (vdss): 30V
• Current - Continuous Drain (id) @ 25° C: 2.5A
• Vgs(th) (max) @ Id: 3V @ 250µA
• Gate Charge (qg) @ Vgs: 15nC @ 10V
• Input Capacitance (ciss) @ Vds: 380pF @ 15V
• Power - Max: 750mW
• Mounting Type: Surface Mount
• Package / Case: SOT-23-3, TO-236-3, Micro3™, SSD3, SST3
• Minimum Operating Temperature: - 55 C
• Configuration: Single
• Resistance Drain-source Rds (on): 0.078 Ohm @ 10 V
• Forward Transconductance Gfs (max / Min): 5 S
• Drain-source Breakdown Voltage: 30 V
• Gate-source Breakdown Voltage: +/- 20 V
• Continuous Drain Current: 2.5 A
• Power Dissipation: 750 mW
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Continuous Drain Current Id: -3.2A
• Drain Source Voltage Vds: -30V
• On Resistance Rds(on): 130mohm
• Rds(on) Test Voltage Vgs: -10V
• Threshold Voltage Vgs Typ: -1V
• Power Dissipation Pd: 1.25W
• Number Of Elements: 1
• Polarity: P
• Channel Mode: Enhancement
• Drain-source On-res: 0.078Ohm
• Drain-source On-volt: 30V
• Gate-source Voltage (max): ±20V
• Operating Temp Range: -55C to 150C
• Operating Temperature Classification: Military
• Mounting: Surface Mount
• Pin Count: 3
• Package Type: TO-236
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: SI2307BDS-T1-E3TR

Wharton McDaniel
Surface-mounted LITTLE FOOT power MOSFETs use integrated
circuit and small-signal packages which have been been modified
to provide the heat transfer capabilities required by power devices.
Leadframe materials and design, molding compounds, and die
attach materials have been changed, while the footprint of the
packages remains the same.
See Application Note 826, Recommended Minimum Pad
Patterns With Outline Drawing Access for Vishay Siliconix
MOSFETs, (http://www.vishay.com/doc?72286), for the basis
of the pad design for a LITTLE FOOT SOT-23 power MOSFET
footprint . In converting this footprint to the pad set for a power
device, designers must make two connections: an electrical
connection and a thermal connection, to draw heat away from the
package.
The electrical connections for the SOT-23 are very simple. Pin 1 is
the gate, pin 2 is the source, and pin 3 is the drain. As in the other
LITTLE FOOT packages, the drain pin serves the additional
function of providing the thermal connection from the package to
the PC board. The total cross section of a copper trace connected
to the drain may be adequate to carry the current required for the
application, but it may be inadequate thermally. Also, heat spreads
in a circular fashion from the heat source. In this case the drain pin
is the heat source when looking at heat spread on the PC board.
Figure 1 shows the footprint with copper spreading for the SOT-23
package. This pattern shows the starting point for utilizing the
board area available for the heat spreading copper. To create this
pattern, a plane of copper overlies the drain pin and provides
planar copper to draw heat from the drain lead and start the
process of spreading the heat so it can be dissipated into the
Document Number: 70739
26-Nov-03
Mounting LITTLE FOOT
R
SOT-23 Power MOSFETs
ambient air. This pattern uses all the available area underneath the
body for this purpose.
Since surface-mounted packages are small, and reflow soldering
is the most common way in which these are affixed to the PC
board, “thermal” connections from the planar copper to the pads
have not been used. Even if additional planar copper area is used,
there should be no problems in the soldering process. The actual
solder connections are defined by the solder mask openings. By
combining the basic footprint with the copper plane on the drain
pins, the solder mask generation occurs automatically.
A final item to keep in mind is the width of the power traces. The
absolute minimum power trace width must be determined by the
amount of current it has to carry. For thermal reasons, this
minimum width should be at least 0.020 inches. The use of wide
traces connected to the drain plane provides a low-impedance
path for heat to move away from the device.
FIGURE 1. Footprint With Copper Spreading
0.059
1.5
0.0394
1.0
0.114
2.9
0.037
0.95
Vishay Siliconix
0.081
2.05
0.150
3.8
AN807
www.vishay.com
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