TDA8754HL11BE-S NXP Semiconductors, TDA8754HL11BE-S Datasheet - Page 30

• Manufacturer Part Number: TDA8754HL11BE-S
• Description: Video ICs TRPL 8BIT VIDEO ADC
• Manufacturer: NXP Semiconductors

Specifications of TDA8754HL11BE-S

• Operating Supply Voltage: 3 V to 3.6 V
• Supply Current: 180 mA
• Maximum Operating Temperature: + 70 C
• Package / Case: SOT-486
• Available Set Gain: 6 dB
• Bandwidth: 700 MHz
• Conversion Rate: 110 msps
• Maximum Power Dissipation: 1.3 W
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Number Of Channels: 3
• Resolution: 8 bit
• Snr: 48 dB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: TDA8754HL/11/C1,55

Philips Semiconductors
Table 36:
Table 37:
Table 38:
Table 39:
Table 40:
9397 750 14984
Product data sheet
Bit
7 to 0
DI11
0
:
1
Bit
9 to 0
9 to 0
11 to 0 HDISPL[11:0] number of active pixels for one line; length of the data enable signal; minimum value is 16
Bit
Symbol
Reset
Access
HSYNCL9
HSYNCL1
HBACKL3
HDISPL7
7
0
0
1
0
VDI10
0
:
1
Symbol
HSYNCL[9:0] length of the Hsync signal; in number of pixel clock cycles; minimum value is 16
HBACKL[9:0] interval between the Hsync active edge and the first active pixel; in number of pixels; minimum
Symbol
DI[7:0]
DIVLSB - PLL divider ratio (LSB) register (address 0Dh) bit allocation
DIVLSB - PLL divider ratio (LSB) register (address 0Dh) bit description
PLL divider ratio
HSYNCL, HBACKL and HDISPL (address 0Eh, 0Fh, 10h, 11h) bit allocation
Sync registers (0Eh to 11h) bit description
9.10 Horizontal sync registers
HSYNCL8
HSYNCL0
HBACKL2
HDISPL6
DI7
VDI9
0
:
1
W
7
1
Description
PLL divider ratio; these are the 8 LSBs of the 12-bit value; see
6
0
0
0
0
Description
value is 16
Remark: The sum of HSYNCL[9:0] + HBACKL[9:0] + HDISPL[9:0] + 16 needs to be
smaller than the PLL divider.
VDI8
0
:
1
DI6
W
HSYNCL7
HBACKL9
HBACKL1
6
0
HDISPL5
VDI7
0
:
1
5
1
0
0
0
VDI6
1
:
1
DI5
W
5
0
HSYNCL6
HBACKL8
HBACKL0
HDISPL4
Register address 0Eh
Register address 0Fh
Register address 10h
Register address 11h
Rev. 06 — 16 June 2005
4
0
0
0
0
VDI5
1
:
1
DI4
W
4
1
VDI4
0
:
1
HDISPL11
HSYNCL5
HBACKL7
HDISPL3
3
0
1
0
0
DI3
0
:
1
DI3
W
3
1
DI2
1
:
1
Triple 8-bit video ADC up to 270 Msps
HDISPL10
HSYNCL4
HBACKL6
HDISPL2
Table 38
2
1
1
1
0
DI1
0
:
1
DI2
W
2
0
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
DI0
0
:
1
HSYNCL3
HBACKL5
HDISPL9
HDISPL1
PLL divider ratio
100
4095
1
0
1
0
0
DI1
W
1
0
TDA8754
HSYNCL2
HBACKL4
HDISPL8
HDISPL0
D0
0
0
1
1
0
W
0
0
30 of 57